HCC4095B Просмотр технического описания (PDF) - STMicroelectronics

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HCC4095B

GATE J-K MASTER-SLAVE FLIP-FLOPS

STMicroelectronics 

HCC/HCF4095B HCC/HCF4096B

FUNCTIONAL DIAGRAMS

LOGIC DIAGRAM

TRUTH TABLES

SYNCHRONOUS OPERATION (S=0 R=0)

Inputs Before Positive Outputs After Positive

Clock Transition

Clock Transition

J*

K*

Q

Q

0

0

No Change

0

1

0

1

1

0

1

0

1

1

Toggles

* For 4095B J = J1 • J2 •J3, K = K1 •K2 • K3

* For 4095B J = J1 • J2 •J3, K = K1 •K2 • K3

2/13

ASYNCHRONOUS OPERATION (J and K

DON’T CARE)

S

R

Q

Q

0

0

No Change

0

1

0

1

1

0

1

0

1

1

0

0

0 = VSS, 1 = VDD

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