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HCC4095B

GATE J-K MASTER-SLAVE FLIP-FLOPS

STMicroelectronics 

HCC/HCF4095B

HCC/HCF4096B

GATE J-K MASTER-SLAVE FLIP-FLOPS

. 16 MHz TOGGLE RATE (typ.) AT

VDD - VSS = 10V

. GATED INPUTS

. QUIESCENT CURRENT SPECIFIED TO 20v

FOR HCC DEVICE

. 5V, 10V AND 15V PARAMETRIC RATINGS

. INPUT CURRENTOF 100 nA AT 18V AND 25oC

FOR HCC DEVICE

. 100% TESTED FOR QUIESCENT CURRENT

. MEETS ALL REQUIREMENTS OF JEDECTEN-

TATIVE STANDARD No 13 A, ”STANDARD

SPECIFICATIONS FOR DESCRIPTION OF B

SERIES CMOS DEVICES”

inputs is transferred to the Q and Q outputs on the

positive edge of the clock pulse. SET and RESET

inputs (active high) are provided for asynchronous

operation.

EY

(Plastic Package)

F

(Ceramic Package)

DESCRIPTION

The HCC4095B/4096B (extended temperature

range) and HCF4095B/4096B (intermediate tem-

perature range) are monolithic integrated circuits,

available in 14 lead dual in-line plastic or ceramic

package and plastic micropackage.

The HCC/HCF4095B and HCC/HCF4096B are J-K

Master-Slave Flip-Flops featuring separate AND

gating of multiple J and K inputs. The gated J-K input

control transfer of information into the master sec-

tion during clocked operation. Information on the J-K

M1

(Micro Package)

C1

(Chip Carrier)

ORDER CODES :

HCC40XXBF

HCF40XXBM1

HC F 4 0XX BE Y

HCF40XXBC1

PIN CONNECTIONS

4095B

4096B

September 1988

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