FM24C64B Просмотр технического описания (PDF) - Cypress Semiconductor
Номер в каталоге
Компоненты Описание
Список матч
FM24C64B Datasheet PDF : 15 Pages
| |||
FM24C64B
AC Parameters (TA = -40 C to + 85 C, VDD = 4.5V to 5.5V, CL = 100 pF unless otherwise specified)
Symbol Parameter
Min Max Min Max Min Max
fSCL
tLOW
tHIGH
tAA
SCL Clock Frequency
Clock Low Period
Clock High Period
SCL Low to SDA Data Out Valid
0 100 0 400 0 1000
4.7
1.3
0.6
4.0
0.6
0.4
3
0.9
0.55
tBUF
Bus Free Before New
Transmission
4.7
1.3
0.5
tHD:STA Start Condition Hold Time
4.0
0.6
0.25
tSU:STA Start Condition Setup for Repeated 4.7
Start
0.6
0.25
tHD:DAT
tSU:DAT
tR
tF
tSU:STO
Data In Hold
Data In Setup
Input Rise Time
Input Fall Time
Stop Condition Setup
0
0
0
250
100
100
1000
300
300
300
300
100
4.0
0.6
0.25
tDH
Data Output Hold
(from SCL @ VIL)
0
0
0
tSP
Noise Suppression Time Constant
50
50
50
on SCL, SDA
Units
kHz
s
s
s
s
s
s
ns
ns
ns
ns
s
ns
ns
Notes
1
1
Notes : All SCL specifications as well as start and stop conditions apply to both read and write operations.
1 This parameter is periodically sampled and not 100% tested.
Capacitance (TA = 25 C, f=1.0 MHz, VDD = 5V)
Symbol
Parameter
CI/O
Input/output capacitance (SDA)
CIN
Input capacitance
Max
8
6
Notes
1 This parameter is periodically sampled and not 100% tested.
Units
pF
pF
Notes
1
1
Power Cycle Timing
VDD
VDD min.
tVR
tPU
tVF
tPD
SDA,SCL
Power Cycle Timing (TA = -40 C to +85 C, VDD = 4.5V to 5.5V unless otherwise specified)
Symbol Parameter
Min
Max
tPU
Power Up (VDD min) to First Access (Start condition)
10
-
tPD
Last Access (Stop condition) to Power Down (VDD min)
0
-
tVR
VDD Rise Time
30
-
tVF
VDD Fall Time
30
-
Notes
1. Slope measured at any point on VDD waveform.
Units
ms
s
s/V
s/V
Notes
1
1
Document Number: 001-84454 Rev. *B
Page 9 of 15
Share Link: 