datasheetbank_Logo
Технический паспорт Поисковая и бесплатно техническое описание Скачать

DS1090 Просмотр технического описания (PDF) - Maxim Integrated

Номер в каталоге
Компоненты Описание
Список матч
DS1090 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
DS1090
Low-Frequency, Spread-Spectrum EconOscillator
Table 2. Dither Percentage Setting
J1
J0
DITHER PERCENT (%)
0
0
0
0
1
2
1
0
4
1
1
8
Dither Percentage Settings
Dither amplitude (measured in percent ± from the master
oscillator center frequency) is set using input pins J0 and
J1. This circuit uses a sense current from the master
oscillator bias circuit to adjust the amplitude of the tri-
angle-wave signal to a voltage level that modulates the
master oscillator to a percentage of its resistor-set center
frequency. This percentage is set in the end application to
be 0%, 2%, 4%, or 8% (see Table 2).
Application Information
Pin Connection
The DS1090 is intended to provide a fixed-frequency,
dithered clock to be used as a clock driver for DC-DC
converters and other applications requiring a low-
frequency EMI-reduced clock oscillator. All control pins
must be biased per Tables 1 and 2 for proper operation
for the individual application’s requirements. RSET must
be tied to ground (GND) by a customer-supplied resistor.
RSET Resistor Selection
The value of the resistor used to select the desired
frequency is calculated using the formula in the Master
Oscillator section (see also Figure 1). It is recommended
to use, at minimum, a 1%-tolerance, 1/16th-watt component
with a temperature coefficient that satisfies the overall
stability requirements desired of the end-equipment.
Place the external RSET resistor as close as possible to
minimize lead inductance.
Power-Supply Decoupling
To achieve best results, it is highly recommended that a
decoupling capacitor is used on the IC power-supply pins.
Typical values of decoupling capacitors are 0.01µF and
0.1µF. Use a high-quality, ceramic, surface-mount capaci-
tor, and mount it as close as possible to the VCC and GND
pins of the IC to minimize lead inductance.
Chip Information
SUBSTRATE CONNECTED TO GROUND
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
www.maximintegrated.com
Maxim Integrated 8

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]