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CXD2453Q

Timing Generator for LCD Panels

Sony Semiconductor 

CXD2453Q

Pin

No.

Symbol

73 VDD

74 TST11

75 TST12

76 TST13

77 VSS

78 XCLR

79 TST14

80 TST15

I/O

Description

— Power supply

— Test pin (connect to VDD)

— Test pin (connect to VDD)

— Test pin (connect to VDD)

— GND

I System clear (Low: All clear)

— Test pin (Not connected.)

— Test pin (Not connected.)

Input pin for

open status

—

—

—

—

—

H

—

—

∗ H: Pull-up, L: Pull-down

Electrical Characteristics

• DC characteristics

(Topr = –20 to +75°C, VSS = 0V)

Item

Symbol

Conditions

Min.

Typ.

Max. Unit Applicable pins

Supply voltage VDD

—

3.0

3.3

3.6

—

Input voltage 1

VIH1

VIL1

3.3V CMOS input

0.65VDD —

VDD

VSS

— 0.25VDD

SLHR, SLFR,

XCLR, SLCK1/2

Input voltage 2

VIH2

VIL2

5.0V CMOS input

0.65VDD

VSS

— VDD + 1.9

— 0.25VDD

CKI2, CKI4

Input voltage 3

Input voltage 4

VIH3

VIL3

VC

(center

level)

VIH4∗1

VIL4∗1

5.0V CMOS

Schmitt trigger input

Low amplitude

differential input

0.8VDD

VSS

(VDD ×

0.606)

– 0.1

VIL4 + 0.3

VSS

—

—

VDD ×

0.606

—

—

VDD + 1.9

0.2VDD V

(VDD ×

0.606)

+ 0.1

VDD

VIH4 – 0.3

SCLK, SDAT, SCTL,

VSYNC, HSYNC

CKI1/XCKI1,

CKI3/XCKI3

VOH

Output voltage 1

VOL

IOH = –4mA

IOL = 4mA

VDD – 0.5 —

VDD

∗2

VSS

—

0.4

VOH

Output voltage 2

VOL

IOH = –8mA

IOL = 8mA

VDD – 0.5 —

VDD

VSS

—

0.4

VCK, BLK, VST,

ENB, PCG

VOH

Output voltage 3

VOL

IOH = –12mA

IOL = 12mA

VDD – 0.5 —

VDD

VSS

—

0.4

HCK1, HCK2,

HST

Input pull-up/pull-

down resistance

RP

Pull-up VI = 0V

Pull-down VI = VDD

SLHR, XCLR

25

50

200 kΩ

SLFR, SLCK1/2

Current

consumption

IDD

Master clock = 95MHz

VDD = 3.3V

—

Output load = 30pF

—

40 mA

—

∗1 VIH4 > (max. value of VC) and VIL4 < (min. value of VC)

∗2 Output pins other than those indicated in items output voltage 2 and output voltage 3.

–5–

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