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CS8416-CZ Просмотр технического описания (PDF) - Cirrus Logic

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CS8416-CZ Datasheet PDF : 48 Pages
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CS8416
+3.3V
Ferrite **
+3.3V
Bead
Analog
Supply **
10 µF 0.1µF 1nF
VL+
AES3 /
*** S/PDIF
Sources
VL+
Hardware
Control
10 µF 0.1µF 1nF
0.1µF 1nF
VA+ VD+
VL+
RXN
RXP0
RXP1
RXP2 CS8416
RXP3
RST
RXSEL0
RXSEL1
TXSEL0
TXSEL1
NV/RERR *
AUDIO *
96KHZ *
RCBL *
U*
C*
OLRCK
OSCLK
SDOUT
RMCK
OMCK
TX
AGND FILT
DGND
Serial Audio
Input Device
47K
Clock Control
Clock Source
External
Interface
Rflt
Cflt
Crip
****
+3.3V to +5V
* These pins must be pulled high to VL+ or low to DGND through a 47Kresistor.
** A seperate analog supply is only necessary in applications where RMCK is used for a jitter
sensitive tast. For applications where RMCK is not used for a jitter sensitive task, connect
VA+ to VD+ via a ferrite bead. Keep decoupling capacitors between VA+ and AGND.
*** Please see section 5.1 "8:2 S/PDIF Input Multiplexer" and Appendix
A for typical input configurations and recommended input circuits.
****
For best jitter performance connect the filter ground directly to the AGND pin.
See Table 2 for PLL filter values.
Figure 6. Typical Connection Diagram - Hardware Mode
DS578PP2
11

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