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CS61310

T1 Line Interface Unit

Cirrus Logic 

CS61310

2.4.3 Jitter Tolerance

The receiver jitter tolerance is shown in Figure 7.

The CS61310 jitter tolerance exceeds AT&T

62411 for synchronizers.

2.5 Jitter Attenuator

Jitter attenuation can be implemented in either the

transmit (JASEL low) or receive (JASEL high)

paths, or it can be eliminated from the circuit by

setting the XTALIN pin high. The jitter attenuator

on the CS61310 does not require a crystal. It is ac-

tivated when XTALIN is either connected to

ground or left open; connecting to ground is the

preferred method.

The jitter attenuator corner frequency is set at 4 Hz,

with attenuation increasing at a 20 dB per decade

rate above 4 Hz. A typical jitter attenuation graph

is shown in Figure 9.

300

138

100

28

10

PEAK-TO-PEAK

JITTER

(unit intervals)

1

.4

Minimum

Performance

AT&T 62411

.1

1

10

100 300 700 1k

10k

100k

JITTER FREQUENCY

(Hz)

Figure 7. Minimum Input Jitter Tolerance of Receiver

0

Minimum Attenuation Limit

10

20

62411 Requirements

30

40 Maximum

Attenuation

50 Limit

60

Measured Performance

1

10

100

1k

10 k

Frequency in Hz

Figure 9. Typical Jitter Transfer Function

2.6 Receiver Line Attenuation Indication

The LATN pin outputs a coded signal that repre-

sents the signal level at the input of the receiver. As

shown in Figure 8, the LATN output is measured

against RCLK to provide the signal level in 7.5 dB

increments. In host mode, the receive input signal

level can be read from the Equalizer Gain register,

address 0x12, to greater resolution, dividing the in-

put range into 20 steps of 2 dB increments.

2.7 Receiver Loss of Signal

The receiver will indicate loss of signal by setting

the LOS pin high in hardware mode (CR1.0 = 1 in

host mode). LOS is active on power up, reset, when

receiver gain is maximized, upon receiving 175+/-

15 consecutive zeros, or when the received signal

power falls below below the signal level, “Loss of

Signal Threshold” listed under Analog Specifica-

tions. Received zeros are counted based on recov-

ered clock cycles. While in the LOS state, received

RCLK

LATN

10

1

2

3

4

5

LATN = 1 RCLK, 7.5 dB of Attenuation

LATN = 2 RCLK, 15 dB of Attenuation

LATN = 3 RCLK, 22.5 dB of Attenuation

LATN = 4 RCLK, 0 dB of Attenuation

Figure 8. LATN Pulse Width encoding

DS440PP2

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