CS5360 Просмотр технического описания (PDF) - Cirrus Logic

Номер в каталоге

Компоненты Описание

Список матч

CS5360

24-Bit Stereo A/D Converter for Digital Audio

Cirrus Logic 

5. PIN DESCRIPTIONS

CS5360

High Pass Filter Defeat

Overflow

Analog Power

Analog Ground

Digital Ground

Digital Power

Master Clock

Serial Data Clock

Serial Data Output

Frame Signal

HPDEFEAT 1

OVFL 2

VA+ 3

AGND 4

DGND 5

VD+ 6

MCLK 7

SCLK 8

SDATA 9

FRAME 10

20 DIF0

Digital Interface Format 0

19 DIF1

Digital Interface Format 1

18 RST

Reset

17 AINL+ Non-Inverting Left Channel Input

16 AINL- Inverting Left Channel Input

15 CMOUT Common Mode Output

14 AINR- Inverting Right Channel Input

13 AINR+ Non-Inverting Right Channel Input

12 LRCK Left / Right Clock

11 PU

Peak Update

High Pass Filter Defeat - HP DEFEAT

Pin 1, Input

Function

A high logic level on this pin disables the digital high pass filter. A low logic level on this pin enables the

high pass filter.

Overflow - OVFL

Pin 2, Input

Function

Overflow indicates analog input overrange, for both the Left and Right channels, since the last update

request on the PEAK UPDATE (PU) pin. A value of 1 in the register indicates an overrange condition.

The left channel information is output on OVFL during the left channel portion of LRCK. The right

channel information is available on OVFL during the right channel portion of LRCK. The registers are

updated with a high to low transition on the PEAK UPDATE pin. A 47 kΩ pull-down resistor on this pin

will set the CS5360 in Master Mode.

Positive Analog Power - VA+

Pin 3, Input

Function:

Positive analog supply. Nominally +5 volts.

Analog Ground - AGND

Pin 4, Input

Function:

Analog ground reference.

DGND - Digital Ground

Pin 5, Input

Function:

Digital ground reference.

16

DS280PP2

Share Link: