CDB5340 Просмотр технического описания (PDF) - Cirrus Logic

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CDB5340

101 dB, 192 kHz, Multi-Bit Audio A/D Converter

Cirrus Logic 

4. APPLICATIONS

Confidential Draft

3/11/08

CS5340

4.1 Single-, Double-, and Quad-Speed Modes

The CS5340 can support output sample rates from 2 kHz to 200 kHz. The proper speed mode can be de-

termined by the desired output sample rate and the external MCLK/LRCK ratio, as shown in Table 1.

Speed Mode

MCLK/LRCK

Ratio

Single-Speed Mode

512x

256x

Double-Speed Mode

256x

128x

Quad-Speed Mode

128x

64x*

* Quad-Speed Mode, 64x only available in Master Mode.

Output Sample Rate Range (kHz)

43 - 50

2 - 50

86 - 100

4 - 100

172 - 200

100 - 200

Table 1. Speed Modes and the Associated Output Sample Rates (Fs)

4.2 Operation as Either a Clock Master or Slave

The CS5340 supports operation as either a clock master or slave. As a clock master, the LRCK and SCLK

pins are outputs with the left/right and serial clocks synchronously generated on-chip. As a clock slave, the

LRCK and SCLK pins are inputs and require the left/right and serial clocks to be externally generated. The

selection of clock master or slave is made via the Mode pins as shown in Table 2.

M1 (Pin 16)

0

0

1

1

M0 (Pin 1)

0

1

0

1

MODE

Clock Master, Single-Speed Mode

Clock Master, Double-Speed Mode

Clock Master, Quad-Speed Mode

Clock Slave, All Speed Modes

Table 2. CS5340 Mode Control

DS601F2

15

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