CS5102A Просмотр технического описания (PDF) - Cirrus Logic
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CS5102A Datasheet PDF : 39 Pages
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CS5101A CS5102A
ANALOG CHARACTERISTICS, CS5102A (Continued)
CS5102A-J
CS5102-B
Parameter*
Symbol Min Typ Max Min Typ Max Unit
Specified Temperature Range
-
0 to +70
-40 to +85
ºC
Analog Input
Aperture Time
-
- 30 -
- 30
-
ns
Aperture Jitter
-
- 100 -
- 100 -
ps
Input Capacitance
(Note 5)
Unipolar Mode
-
Bipolar Mode
-
- 320 425 - 320 425 pF
- 200 265 - 200 265 pF
Conversion and Throughput
Conversion Time
Acquisition Time
Throughput
Power Supplies
(Note 17) tc
(Note 18) ta
(Note 19) ftp
-
- 40.625 -
- 40.625 µs
-
- 9.375 -
- 9.375 µs
20 -
- 20 -
- kSps
Power Supply Current
(Note 20)
Positive Analog
Negative Analog
(SLEEP High)
Positive Digital
Negative Digital
Power Consumption
(Note 10, Note 20)
(SLEEP High)
(SLEEP Low)
Power Supply Rejection
(Note 21)
Positive Supplies
Negative Supplies
IA+
IA-
ID+
ID-
Pdo
Pds
PSR
PSR
- 2.4 3.5 - 2.4 3.5 mA
- -2.4 -3.5 - -2.4 -3.5 mA
- 2.5 3.5 - 2.5 3.5 mA
- -1.5 -2.5 - -1.5 -2.5 mA
- 44 65 - 44 65 mW
-1
-
-1
-
mW
- 84 -
- 84
-
dB
- 84 -
- 84
-
dB
Notes: 17.
18.
19.
20.
21.
Conversion time scales directly to the master clock speed. The times shown are for synchronous, internal loopback
(FRN) mode. In PDT, RBT, and SSC modes, asynchronous delay between the falling edge of HOLD and the start
of conversion may add to the apparent conversion time. This delay will not exceed 1 master clock cycle + 140 ns.
The CS5102A requires 6 clock cycles of coarse charge, followed by a minimum of 5.625 µs of fine charge. FRN
mode allows 9 cycles for fine charge which provides for the minimum 5.625 µs with a 1.6 MHz clock, however; in
PDT, RBT, or SSC modes and at clock frequencies of less than 1.6 MHz, fine charge may be less than 9 clock
cycles.
Throughput is the sum of the acquisition and conversion times. It will vary in accordance with conditions affecting
acquisition and conversion times, as described above.
All outputs unloaded. All inputs at VD+ or DGND. See table below for power dissipation versus clock frequency.
With 300 mV p-p, 1-kHz ripple applied to each supply separately in the bipolar mode. Rejection improves by 6 dB
in the unipolar mode to 90 dB. Figure 25 shows a plot of typical power supply rejection versus frequency.
Typical Power (mW)
34
37
39
41
44
CLKIN (MHz)
0.8
1.0
1.2
1.4
1.6
8
DS45F6
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