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CMX649 Просмотр технического описания (PDF) - CML Microsystems Plc

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CMX649
CML
CML Microsystems Plc CML
CMX649 Datasheet PDF : 50 Pages
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ADM Codec
CODEC MODE CONTROL Register ($70)
Reserved
(Bits 7 – 3)
These bits are reserved and should be set to a logic 0.
CMX649
CODEC MODE
(Bits 2 – 0)
Bit 2
0
0
0
0
1
Bit 1
0
0
1
1
0
Bit 0
0
1
0
1
0
CODEC Mode
ADM mode without buffered I/O
ADM mode with buffered I/O
Linear PCM with buffered I/O
µ-law PCM with buffered I/O
A-law PCM with buffered I/O
SCRAMBLER CONTROL Register ($71)
Scrambler
Enable
(Bit 15)
Setting this bit to a logic 1 enables the scrambler.
Reserved
(Bit 14)
Reserved for future use. Set to ‘0’.
Scrambler
Output Invert
(Bit 13)
Setting this bit to a logic 1 inverts the scrambler output polarity.
De-Scrambler
Enable
(Bit 12)
Setting this bit to a logic 1 enables the de-scrambler.
Reserved
(Bit 11)
Reserved for future use. Set to ‘0’.
De-Scrambler
Input Invert.
(Bit 10)
Setting this bit to a logic 1 inverts the de-scrambler input polarity.
LFSR Tap
Select
(Bits 9 – 0)
These bits directly program the polynomial for the scrambler and de-scrambler:
PR = B9X9 + B8X8 + B7X7 +B6X6 + B5X5 + B4X4 + B3X3 + B2X2 + B1X1 + B0X0
© 2003 CML Microsystems Plc
21
D/649/2

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