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CL-PS6700

Low-Power PC Card Controller for the CL-PS7111

Cirrus Logic 

CL-PS6700

Low-Power PC Card Controller

2.2.2 Access Control Signals (cont.)

Signal

Type

Power

Source

Description

PCM_REG_L

O pcm Single-mode. This signal, in conjunction with the card data strobes, PCM_OE_L,

PCM_WE_L, PCM_IORD_L, and PCM_IOWR_L, determine which of the three address

spaces (I/O, common memory, or attribute memory) is chosen and if the transfer is a DMA or

non-DMA type.

1 – common memory or DMA access

0 – I/O space or attribute memory space access

Table 2-5. PC Card Access Types

Card Access Type

PCM_OE_L

PCM_WE_L

PCM_IORD_L

PCM_IOWR_L

PCM_REG_L

Common Memory Read/Write Data strobe

Attribute Memory Read/Write Data strobe

Card I/O Read/Write

Deasserted

Card DMA Read/Write

Terminal count

Deasserted

Deasserted

Data strobe

Data strobe

Deasserted

Asserted

Asserted

Deasserted

PCM_WP

PCM_WAIT_L

PCM_RDY

I

pcm Dual-mode.

Memory Mode: This signal indicates that the card has been set to be write-protected.

I/O Mode: This signal becomes IOIS16_L. An asserted level (low) indicates that the I/O card

is a 16-bit device. If IOIS16_L is not asserted (high), the device is assumed to be 8-bit, and

data transfer occurs over byte lane D[7:0]. In this mode, the WP status of the card is avail-

able as an on-card register bit.

DMA Mode: This signal can be selected as DREQ from the PC Card.

I

pcm Single-mode. This data wait signal is used by the card to delay completion of an in-progress

memory or I/O access cycle. It is sampled by the CL-PS6700 with a flip-flop clocked on the

rising edge of PCLK, then fed to the card interface logic. In order to be recognized, this sig-

nal must be asserted at least two clocks before the end of the command strobe.

I

pcm Dual-mode.

Memory Mode: This signal is deasserted while the card is busy processing a previous

transfer. It is intended to signal the completion of potentially lengthy operations within the

card. This signal is available as a status bit for polling by the CPU, and can generate an

interrupt to the CPU. It can also form the PRDY signal to the CL-PS7111 for handshake, pre-

venting masters from targeting a busy card.

I/O Mode: This signal is IREQ_L, an interrupt request generated by the I/O card. The RDY

function of memory mode is available as an on-card register bit.

DMA Mode: This input can be selected as DREQ from the PC Card.

CIRRUS LOGIC CONFIDENTIAL, NDA REQUIRED

November 1997

PRELIMINARY DATA BOOK v1.0

15

PIN DESCRIPTIONS

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