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CL-PS6700 Просмотр технического описания (PDF) - Cirrus Logic

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CL-PS6700 Datasheet PDF : 48 Pages
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CL-PS6700
Low-Power PC Card Controller
4. REGISTERS
The CL-PS6700 registers are spaced at 1-Kbyte boundaries and must be accessed by the CPU in word
mode (not byte mode), even though they are all 16 bits or less in actual width. The upper 16 bits of register
reads should be treated as undefined. The CL-PS6700 registers are accessible in all power states where
the CL-PS6700 is powered and has a running PCLK (regardless of the state of PRDY). PC Card access
should be done only when the CL-PS6700 is in Active mode.
Since register access circumvents the CL-PS6700 write queue, control of register bits, which can affect
posted writes or prefetch reads such as applying and removing card power, should be done only after
checking that the CL-PS6700 is idle using the Idle bit in the Interrupt Input Level register.
4.1 Register Addresses
The following address conventions are used in the register tables.
The tables show the offset from the base addresses. In a CL-PS7111 based system, the CL-PS6700
address spaces start with base addresses 0x4000_0000 for the first PC Card socket (that is, the one con-
nected to NCS[4]), and 0x5000_0000 for the second CL-PS6700 (connected to NCS[5]). To calculate the
address for any register, add the offset (for example, 0X0C00_2800 for the Power Management register)
to the base (for example, 0x4000_0000 for the CL-PS6700 connected to NCS[4]) to get the address
(0X4C00_2800).
Offset from
Base
Description
Address
0X0C002800 Power Management register
0X0C002C00 Card Power Control register
0X0C002000 System Interface Configuration register
0X0C004000 DMA Control register
0X0C004400 Device Information register
0X0C002400 Card Interface Configuration register
0X0C003000 Card Interface Timing register 0A
0X0C003400 Card Interface Timing register 0B
0X0C003800 Card Interface Timing register 1A
0X0C003C00 Card Interface Timing register 1B
0X0C000000 PC Card Interrupt Status register
0X0C000400 PC Card Interrupt Mask register
0X0C000800 PC Card Interrupt Clear register
0X0C000C00 PC Card Interrupt Output Select register
Default R/W
0
R/W
0
R/W
0x1F8
R/W
0
R/W
0x0040 R/W
0
R/W
0x1F00 R/W
0
R/W
0x1F00 R/W
0
R/W
0
R
0
R/W
XX
W
0
W
November 1997
CIRRUS LOGIC CONFIDENTIAL, NDA REQUIRED
PRELIMINARY DATA BOOK v1.0
21
REGISTERS

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