VP306SCGGP1N Просмотр технического описания (PDF) - Mitel Networks
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VP306SCGGP1N Datasheet PDF : 85 Pages
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DRAFT - PRELIMINARY DATA
VP305/6
0
one
byte per
1
position
2
3
4
5
6
7
8
9
10
11
Sync word route
0
17x11 bytes
1
17x10 bytes
2
17x9 bytes
3
17x8 bytes
4
17x7 bytes
5
17x6 bytes
6
17x5 bytes
7
17x4 bytes
8
17x3 bytes
9
17x2 bytes
10
17x1
11
Fig. 10. Conceptual diagram of the convolutional de-interleaver block.
The byte sequence for the first 204 byte block is shown below. Each row represents one branch
FIFO.
1 13 25 37 49 61 73 85 97 109 121 133 145 157 169 181 193
2 14 26 38 50 62 74 86 98 110 122 134 146 158 170 182 194
3 15 27 39 51 63 75 87 99 111 123 135 147 159 171 183 195
4 16 28 40 52 64 76 88 100 112 124 136 148 160 172 184 196
5 17 29 41 53 65 77 89 101 113 125 137 149 161 173 185 197
6 18 30 42 54 66 78 90 102 114 126 138 150 162 174 186 198
7 19 31 43 55 67 79 91 103 115 127 139 151 163 175 187 199
8 20 32 44 56 68 80 92 104 116 128 140 152 164 176 188 200
9 21 33 45 57 69 81 93 105 117 129 141 153 165 177 189 201
10 22 34 46 58 70 82 94 106 118 130 142 154 166 178 190 202
11 23 35 47 59 71 83 95 107 119 131 143 155 167 179 191 203
12 24 36 48 60 72 84 96 108 120 132 144 156 168 180 192 204
Table 4. De-interleaver data sequence.
The duplication or disclosure of data contained on this sheet is subject to the restrictions
on the title page of this document.
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