HD74CDC857 Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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HD74CDC857

3.3/2.5-V Phase-lock Loop Clock Driver

Hitachi -> Renesas Electronics 

HD74CDC857

Electrical Characteristics

Item

Symbol Min

Typ *1 Max Unit Test Conditions

Input clamp CLK, CLK

VIK

voltage

FBIN, FBIN, G

—

—

–1.2 V

II = –18 mA, VDDQ = 2.3 V

Output voltage

VOH

VCC–0.2 —

—

V

IOH = –100 µA, VCC = 2.3 to 2.7 V

1.95 —

—

IOH = –8 mA, VCC = 2.3 V

1.70 —

—

IOH = –16 mA, VCC = 2.3 V

VOL

—

—

0.2

IOL = 100 µA, VCC = 2.3 to 2.7 V

—

—

0.35

IOL = 8 mA, VCC = 2.3 V

—

—

0.55

IOL = 16 mA, VCC = 2.3 V

Input current

II

—

—

±10

µA VI = 0 V to 2.7 V, VDDQ = 2.7 V

Input capacitance

CI

—

—

4

pF

Note: 1. For conditions shown as Min or Max, use the appropriate value specified under recommended

operating conditions.

Switching Characteristics

Item

Symbol Min

Typ

Cycle to cycle jitter

–100 —

Phase error time

t(phase error) –150

—

Output skew

tsk (o)

—

—

Differential clock skew

tsk (diff)

–100

—

Duty cycle

45

—

Output impedance

Clock frequency

ZO

—

25

f CLK

100

—

130

—

Max

100

150

200

100

55

—

150 *1

150 *1

Slew rate

1.2

—

—

Stabilization time

—

—

0.1

Note: 1. 200 MHz (Max) ver. will be available by 4Q/’99.

Unit Test Conditions

ps See figure 2

ps See figure 2, 3, 4

ps See figure 2

ps See figure 2

% See figure 2

Ω See figure 2

MHz See figure 2, AVCC = 2.5±0.2 V

See figure 2, AVCC = 2.5±0.2 V

or AVCC = 3.3±0.3 V

V/ns See figure 2

ms See figure 2, 3

8

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