BD3951F
●Block Diagram, Application Circuit, Pin Description
Vcc
1
0.33μF
R2:36kΩ
PreReg
Vref
R1:10kΩ
OUT
8
3.3μF
OUT SOUT RES GND
Technical Note
RADJ 3
VCC
VCC
2
SIN
GND
5
20kΩ
6 RES
CT
4
0.1μF
20kΩ
SOUT
7
Fig.13
Vcc SIN RADJ CT
PIN
Vcc
OUT
CT
SIN
RADJ
External
Component
Capacitor :Cin
Capacitor :Co
Capacitor :Cct
Resistor :R1,R2
Resistor :R3,R4
Fig.14
Value
0.33μF~
10mF
3.3μF~
2200μF
0.01μF~10μF
0Ω~100kΩ
0Ω~100kΩ
・ ESR range of the output capacitor Co is 0 (ceramic capacitor) to 100Ω.
・ VCC must be more than 5V under the condition SIN is used for VCC voltage drop detection.
Ex. Vcc=5.8V detection, Since 1.26V*(R1+R2)/R1=5.8V,
R1=10kΩ,R2=36kΩ
・ Reset detection voltage must be more than 4V under the condition RADJ is used for OUT voltage drop detection.
Ex. OUT=4.5V detection, Since 1.26V*(R3+R4)/R3=4.5V,
R3=10kΩ,R4=26kΩ
OUT
(8PIN)
3.3μF
R4=26kΩ
R3=10kΩ
RADJ
(3PIN)
RESET function can be discarded while RADJ terminal pulls up to OUT terminal, which in case RES terminal output “H”.
Battery detection function can be discarded while SIN terminal pulls up to OUT terminal, which in case SOUT terminal output
“H”. 0~47KΩ pull up resistors are recommended in both condition. Set application board test is necessary to select the
right pull up resistor value.
●Terminal Description
Pin. No
Pin Name
1
Vcc
2
SIN
3
RADJ
4
CT
5
GND
6
RES
7
SOUT
8
OUT
Function
Battery power supply
Battery voltage detection input terminal. Must be connected to OUT terminal while this
function is not employed.
RESET voltage adjustment terminal. Connect to GND in case internal detect voltage is
employed
RESET delay time control terminal
IC GND terminal
RESET output terminal. Built in 20KΩ pull up.
Battery voltage detection output terminal. Built in 20KΩ pull up.
5.0V output terminal
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© 2009 ROHM Co., Ltd. All rights reserved.
2009.07 - Rev.A