MB40950PF Просмотр технического описания (PDF) - Fujitsu

Номер в каталоге

Компоненты Описание

Список матч

MB40950PF

3-Channel 10-Bit D/A Converter

Fujitsu 

MB40950

s CALCULATION OF DAC OUTPUT VOLTAGE AT IDEAL CONVERSION

1023 – N

ROUT (GOUT, BOUT) = VCCA –

X ( VCCA – VRIN )

1024 [ N : Digital Input Code (0 to 1023) ]

VOFS = VCCA

1023

VOZS = VCCA –

1024

X ( VCCA – VRIN )

s TYPICAL CONNECTION EXAMPLE

5V

2.2µH

2.2µH

0.01µF

Data Input

CLK Input

47µF

47µF

VCCD

R 1 to 10

G1 to 10

B1 to 10

CLKR

CLKG

CLKB

D. GND

VCCA

ROUT

GOUT

BOUT

VROUT2

VRIN

VROUT1

COMP

A. GND

0.01µF

Connect to VROUT1, VROUT2, or

external reference voltage source.

0.1µF

s NOTES ON USE

1. Power Supply Patterns of the PCB

The power supply wire patterns (VCC and GND patterns) of the PCB should be designed as wide as possible

in order to reduce parasitic impedance.

2. Switching Noise

In order to reduce switching noise as much as possible, noise limit capacitor must be connected between VCCD

and D. GND pins and VCCA and A. GND pins.

In this case, the capacitor should be connected to the GND pins side as near as possible.

9

Share Link: