W981216BH-75(2000) Просмотр технического описания (PDF) - Winbond

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W981216BH-75
(Rev.:2000)

2M x 4 BANKS x 16 BIT SDRAM

Winbond 

W981216BH

GENERAL DESCRIPTION

2M × 4 BANKS × 16 BIT SDRAM

W981216BH is a high-speed synchronous dynamic random access memory (SDRAM), organized as

2M words × 4 banks × 16 bits. Using pipelined architecture and 0.175 µm process technology,

W981216BH delivers a data bandwidth of up to 143M words per second (-7). To fully comply with the

personal computer industrial standard, W981216BH is sorted into three speed grades: -7, -75 and -

8H. The -7 is compliant to the 143 MHz/CL3 or PC133/CL2 specification, the -75 is compliant to the

PC133/CL3 specification, the -8H is compliant to the PC100/CL2 specification

Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be

accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE

command. Column addresses are automatically generated by the SDRAM internal counter in burst

operation. Random column read is also possible by providing its address at each clock cycle. The

multiple bank nature enables interleaving among internal banks to hide the precharging time.

By having a programmable Mode Register, the system can change burst length, latency cycle,

interleave or sequential burst to maximize its performance. W981216BH is ideal for main memory in

high performance applications.

FEATURES

• 3.3V ±0.3V Power Supply

• Up to 143 MHz Clock Frequency

• 2,097,152 Words × 4 banks × 16 bits organization

• Auto Refresh and Self Refresh

• CAS Latency: 2 and 3

• Burst Length: 1, 2, 4, 8, and full page

• Burst Read, Single Writes Mode

• Byte Data Controlled by DQM

• Power-Down Mode

• Auto-precharge and Controlled Precharge

• 4K Refresh cycles / 64 mS

• Interface: LVTTL

• Packaged in TSOP II 54 pin, 400 mil - 0.80

KEY PARAMETERS

SYM.

DESCRIPTION

tCK

tAC

tRP

tRCD

ICC1

ICC4

ICC6

Clock Cycle Time

Access Time from CLK

Precharge to Active Command

Active to Read/Write Command

Operation Current (Single bank)

Burst Operation Current

Self-Refresh Current

MIN.

/MAX.

Min.

Max.

Min.

Min.

Max.

Max.

Max.

-7

(PC133, CL2)

7 nS

5.4 nS

15 nS

15 nS

80 mA

100 mA

2 mA

-75

(PC133, CL3)

7.5 nS

5.4 nS

20 nS

20 nS

75 mA

95 mA

2 mA

-8H

(PC100)

8 nS

6 nS

20 nS

20 nS

70 mA

90 mA

2 mA

Publication Release Date: October 2000

-1-

Revision A1

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