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AN-1077

PFC Converter Design with IR1150 One Cycle Control IC

International Rectifier 

Application Note AN-1077

One Cycle Control for PFC

Applications

The operation of the one cycle control is analyzed

in detail in several papers [3][4][5].

The converter output voltage Vo is scaled down

thru the output divider and is presented at the input of

the error amplifier VFB. The error amplifier is used to

provide loop compensation and to generate the error

signal or modulation voltage Vm.

VFB

Vm

VREF

Cz

Cp

Rgm

Figure 3 - Resettable integrator characteristic

An important characteristic is that integration time

constant of the integrator must match the switching

period, so that at the end of each cycle the ramp will

match the integrated value.

Figure 1 - Error Amplifier

The core of the One Cycle control is a resettable

integrator. This block integrates the modulation volt-

age and is reset at the end of every switching cycle.

Figure 2 - Core of the One Cycle Control

Since the voltage loop bandwidth is very small the

modulation voltage will vary very slowly and can be

considered constant during a switching cycle. This

means that the output of the integrator will be a linear

ramp. The slope of the integrator ramp is directly pro-

portional to the output voltage of the error amplifier,

vm.

Figure 4 - PWM Signal Generation

The reference for the PWM comparator is ob-

tained by subtracting the voltage across the current

sense resistor from the modulation voltage:

vm − GDC ⋅ vSNS

(8)

This is the required input configuration to the gen-

eral OCC PWM in order to properly control the boost

converter with trailing edge modulation.

By providing a reference threshold dependant on

the input current and a ramp signal dependant on the

output voltage, the required control of the converter

duty cycle is realized to achieve output voltage regula-

tion and power factor correction.

International Rectifier Technical Assistance Center:

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