ADV7610 Просмотр технического описания (PDF) - Analog Devices
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ADV7610 Datasheet PDF : 16 Pages
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Data Sheet
ADV7610
Ball No.
H1
H2
J1
K1
K2
J2
K3
J3
K4
J4
K5
J5
K6
J6
K7
J7
K8
J8
K9
J9
H10
H9
G10
G9
F10
E10
F9
E9
D10, C10, D9, C9
A9
B9
A8
B8
B7
A7
B6
A6
A5
B4
B5
A3
B3
A2
Mnemonic
P23
P22
P21
P20
P19
P18
P17
P16
LLC
P15
P14
P13
P12
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
P0
DE
HS
VS/FIELD/ALSB
I2S0 to I2S3
SCLK/INT2
LRCLK
MCLK/INT2
SCL
SDA
INT1
RESET
XTALP
XTALN
CEC
CS
DDCA_SCL
DDCA_SDA
RXA_5V
Type
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Miscellaneous digital
Digital video output
Digital input/output
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Miscellaneous analog
Miscellaneous analog
Digital input/output
Miscellaneous digital
HDMI input
HDMI input
HDMI input
Description
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Line Locked Output Clock for the Pixel Data the Range is 13.5 MHz to 162.5 MHz.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Data Enable. DE is a signal that indicates active pixel data.
Horizontal Synchronization Output Signal.
Vertical Synchronization Output Signal.
Field Synchronization Output Signal in All Interlaced Video Modes.
VS or FIELD can be configured for this pin.
The ALSB allows selection of the I2C address.
Audio Output Pins. These pins can be configured to output S/PDIF digital
audio (S/PDIF) or I2S.
A dual function pin that can be configured to output an audio serial clock or
an Interrupt 2 signal.
Audio Left/Right Clock.
A dual function pin that can be configured to output an audio master clock or
an Interrupt 2 signal.
I2C Port Serial Clock Input. SCL is the clock line for the control port.
I2C Port Serial Data Input/Output Pin. SDA is the data line for the control port.
Interrupt 1. This pin can be active low or active high. When status bits change, this
pin is triggered. The events that trigger an interrupt are under user configuration.
System Reset Input. Active low. A minimum low reset pulse width of 5 ms is
required to reset the ADV7610 circuitry.
Input Pin for 28.63636 MHz Crystal or an External 1.8 V, 28.63636 MHz Clock
Oscillator Source to Clock the ADV7610.
Crystal Input. Input pin for 28.63636 MHz crystal.
Consumer Electronic Control Channel.
Chip Select (Bar). Pulling this line high causes the I2C state machine to ignore
the I2C transmission.
HDCP Slave Serial Clock Port A. DDCA_SCL is a 3.3 V input that is 5 V tolerant.
HDCP Slave Serial Data Port A. DDCA_SDA is a 3.3 V input that is 5 V tolerant.
5 V Detect Pin for Port A in the HDMI Interface.
Rev. 0 | Page 9 of 16
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