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ADV7610

Low Power, 165 MHz HDMI Receiver

Analog Devices 

Data Sheet

FUNCTIONAL OVERVIEW

HDMI RECEIVER

The receiver supports all mandatory and many optional 3D

formats. It supports HDTV formats up to UXGA at eight bits.

The HDMI-compatible receiver on the ADV7610 incorporates

programmable equalization of the HDMI data signals. This

equalization compensates for the high frequency losses inherent

in HDMI and DVI cabling, especially at longer lengths and higher

frequencies. It is capable of equalizing for cable lengths of up to

30 meters to achieve robust receiver performance.

With the inclusion of HDCP, displays can receive encrypted

video content. The HDMI interface of the ADV7610 allows for

authentication of a video receiver, decryption of encoded data at

the receiver, and renewability of that authentication during

transmission, as specified by the HDCP 1.4 protocol.

The ADV7610 has a synchronization regeneration block to

regenerate the DE based on the measurement of the video

format being displayed and to filter the horizontal and vertical

synchronization signals to prevent glitches. The HDMI receiver

also supports TERC4 error detection for detection of corrupted

HDMI packets following a cable disconnect.

The HDMI receiver contains an audio mute controller that can

detect a variety of conditions that may result in audible extraneous

noise in the audio output. On detection of these conditions, the

audio signal can be ramped to prevent audio clicks or pops.

Audio output can be formatted to LPCM and IEC 61937.

The HDMI receiver features include:

• 162.5 MHz (UXGA at eight bits) maximum TMDS clock

frequency

• 3D format support defined in the HDMI specification

• Integrated equalizer for cable lengths of up to 30 meters

• HDCP 1.4

• Internal HDCP keys

• PCM audio packet support

• TDM I2S audio packet support

• Repeater support

• Internal EDID RAM

• Hot Plug assert output pin for an HDMI port

• CEC controller

ADV7610

COMPONENT PROCESSOR (CP)

The ADV7610 has an any-to-any 3 × 3 CSC matrix. The CSC

block is placed in the output section of the component processor.

The CSC enables YPrPb-to-RGB and RGB-to-YCrCb conversions.

Many other standards of colorspace can be implemented using

the colorspace converter.

CP features include:

• 525i, 625i, 525p, 625p, 720p, 1080i, 1080p, and other formats

• Manual adjustments including gain (contrast) and offset

(brightness), hue, and saturation

• Free run output mode that provides stable timing when no

video input is present

• 162.5 MHz processing rate

• Contrast, brightness, hue, and saturation controls

• Standard identification enabled by STDI block

• RGB that can be color space converted to YCrCb and

decimated to a 4:2:2 format for videocentric back-end IC

interfacing

• DE output signal supplied for direct connection to an

HDMI/DVI transmitter

OTHER FEATURES

The ADV7610 has HS, VS, FIELD, and DE output signals with

programmable position, polarity, and width.

The ADV7610 has programmable interrupt request output pins,

including INT1 and INT2 (INT2 is accessible only via one of

following pins: MCLK/INT2, SCLK/INT2, or HPA_A/INT2).

It also features a low power-down mode. The I2C address of the

main map is 0x98 after reset. This can be changed after reset to

0x9A if pull-up is attached to the VS/FIELD/ALSB pin and the

I2C command SAMPLE_ALSB is issued.

The ADV7610 is provided in a 6 mm × 6 mm, RoHS-compliant

BGA package and is specified over the −40°C to +85°C

temperature range.

For more detailed product information about the ADV7610,

contact the local Analog Devices, Inc., sales office.

Rev. 0 | Page 11 of 16

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