AD9254S Просмотр технического описания (PDF) - Analog Devices

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AD9254S

14-Bit, 105 MSPS, 1.8V Analog-To-Digital Converter

Analog Devices 

TABLE I NOTES:

1/ Ta = +25C, Ta max = +110C, Ta min = -55C. Unless otherwise noted, AVDD = 1.8 V; DRVDD = 2.5 V, maximum sample rate, 2 V p-p differential input, 1.0

V internal reference; AIN = −1.0 dBFS, DCS enabled. OEB=PWDN = LOW (External) where exposed paddle is soldered to ground.

2/ See Section 7 Application Notes for details on Ain options, reference and timing modes and diagrams, and other product application details.

3/ Parameter is part of device initial characterization which is only repeated after design and process

changes or with subsequent wafer lots.

4/ Modes register setting: PWDN bit = FULL, Internal Power -Down bits = STBY

5/ Modes register setting: PWDN bit = STBY, Internal Power -Down bits = Normal Power Up, OE = PWDN = HIGH (External setting)

6/ Parameter verified during Accuracy Tests.

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