AD9254S Просмотр технического описания (PDF) - Analog Devices

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AD9254S

14-Bit, 105 MSPS, 1.8V Analog-To-Digital Converter

Analog Devices 

AVDD to AGND.............................................................................................................................0.3 V to +2.0 V

DRVDD to DGND........................................................................................................................−0.3 V to +3.9 V

AGND to DGND..........................................................................................................................−0.3 V to +0.3 V

AVDD to DRVDD.........................................................................................................................−3.9 V to +2.0 V

D0 through D13 to DGND...............................................................................................−0.3 V to DRVDD + 0.3 V

DCO to DGND..............................................................................................................−0.3 V to DRVDD + 0.3 V

OR to DGND.................................................................................................................−0.3 V to DRVDD + 0.3 V

CLK+ to AGND............................................................................................................................−0.3 V to +3.9 V

CLK− to AGND............................................................................................................................−0.3 V to +3.9 V

VIN+ to AGND.................................................................................................................−0.3 V to AVDD + 0.2 V

VIN− to AGND.................................................................................................................−0.3 V to AVDD + 0.2 V

VREF to AGND...............................................................................................................−0.3 V to AVDD + 0.2 V

SENSE to AGND.............................................................................................................−0.3 V to AVDD + 0.2 V

REFT to AGND................................................................................................................−0.3 V to AVDD + 0.2 V

REFB to AGND...............................................................................................................−0.3 V to AVDD + 0.2 V

SDIO/DCS to DGND.....................................................................................................−0.3 V to DRVDD + 0.3 V

PDWN to AGND..........................................................................................................................−0.3 V to +3.9 V

CSB to AGND..............................................................................................................................−0.3 V to +3.9 V

SCLK/DFS to AGND...................................................................................................................−0.3 V to +3.9 V

OEB to AGND.............................................................................................................................−0.3 V to +3.9 V

Storage Temperature Range.....................................................................................................–65°C to +125°C

Power Dissipation(PD)...........................................................................................................................520mW 2/

Lead Temperature (Soldering 10 Sec)......................................................................................................+300°C

Junction Temperature (TJ)...........................................................................................................................125°C

Thermal resistance, junction-to-case (JC)...............................................................................................14 C/W

Thermal resistance, junction-to-ambient (JA)......................................................................................23 C/W 3/

Analog Supply Voltage (AVDD).......................................................................................................1.7 V to 1.9 V

Digital Output Driver Supply voltage (DRVDD)................................................................................1.8 V to 3.3 V

Ambient operating temperature range (TA)..................................................................................-55C to +110C

Load Regulation @ 1.0mA............................................................................................................................7 mV

DC Input Power........................................................................................................................................470 mW

Analog Input Capacitance.........................................................................................................................10pF 5/

Differential Analog Input Voltage................................................................................................0.2 Vpp to 6 Vpp

Analog Input Voltage range....................................................................................AVDD - 0.3V to AVDD + 1.6 V

Clock Input Common Mode Range................................................................................................1.1 V to AVDD

Conversion Rate, DCS Enabled......................................................................................20 MSPS to 150 MSPS

Conversion Rate, DCS Disabled......................................................................................10 MSPS to 150 MSPS

Temperature Drift: Offset Error...........................................................................................................±15 ppm/°C

Temperature Drift: Gain Error.............................................................................................................±95 ppm/°C

Input Referred Noise (VREF = 1.0V).................................................................................................1.3 LSB rms

Reference Input Resistance...........................................................................................................................6 kΩ

Differential Clock Input Capacitance..............................................................................................................4 pF

Differential Clock Input Resistance...............................................................................................................12kΩ

Logic Input Resistance(SCLK/DFS, OEB, PDWN)......................................................................................30 kΩ

Logic Input Capacitance(SCLK/DFS, OEB, PDWN)......................................................................................2 pF

Logic Input Resistance(CSB).......................................................................................................................26 kΩ

Logic Input Capacitance(CSB).......................................................................................................................2 pF

Logic Input Resistance(SDIO/DCS).............................................................................................................26 kΩ

Logic Input Capacitance (SDIO/DCS)............................................................................................................5 pF

DCO Propagation Delay (TDCO)...................................................................................................................4.4 ns

Pipeline Delay (Latency)........................................................................................................................12 Cycles

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