AD9216-105PCB Просмотр технического описания (PDF) - Analog Devices
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AD9216-105PCB Datasheet PDF : 20 Pages
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Preliminary Technical Data
AD9216
Table 7. Pin Function Descriptions
Pin
Mnemonic
Number
2
VIN+_A
3
VIN–_A
15
VIN+_B
14
VIN- _B
6
REFT_A
7
REFB_A
11
REFT_B
10
REFB_B
8
VREF
9
SENSE
18
CLK_B
63
CLK_A
19
DCS
20
DFS
21
PDWN_B
60
PDWN_A
22
OEB_B
59
OEB_A
46–51, 54- D0_A (LSB)-D9_A
57
(MSB)
27, 30-38
D0_B (LSB) –D9_B
(MSB)
39
OTR_B
58
OTR_A
62
SHARED_REF
61
MUX_SELECT
5, 12, 17,
64
1, 4, 13, 16
28, 40, 53
29, 41, 52
AVDD
AGND
DRGND
DRVDD
23-26, 42- DNC
45
Description
Analog Input Pin (+) for Channel A
Analog Input Pin (- ) for Channel A
Analog Input Pin (+) for Channel B
Analog Input Pin (- ) for Channel B
Differential Reference (+) for Channel A
Differential Reference (- ) for Channel A
Differential Reference (+) for Channel B
Differential Reference (- ) for Channel B
Voltage Reference Input/Output
Reference Mode Selection
Clock Input Pin for Channel B
Clock Input Pin for Channel A
Enable Duty Cycle Stabilizer (DCS) Mode ( Tie to AVDD to enable)
Data Output Format Select Bit (Low for Offset Binary, High for Twos Complement)
Power-Down Function Selection for Channel B (Active High)
Power-Down Function Selection for Channel A (Active High)
Output Enable Bit for Channel B (Low Setting Enables Channel B Output Data Bus)
Output Enable Bit for Channel A (Low Setting Enables Channel A Output Data Bus)
Channel A Data Output Bits
Channel B Data Output Bits
Out-of-Range Indicator for Channel B
Out-of-Range Indicator for Channel A
Shared Reference Control Bit (Low for Independent Reference Mode, High for Shared
Reference Mode)
Data Multiplexed Mode. (See description for how to enable; high setting disables output data
Multiplexed mode)
Analog Power Supply
Analog Ground
Digital Output Ground
Digital Output Driver Supply. Must be decoupled to DRGND with a minimum 0.1 µF capacitor.
Recommended decoupling is 0.1 µF capacitor in parallel with 10 µF
Do Not Connect Pins. Should be left floating.
Rev. PrD
Page 9 of 20
6/15/2004
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