AD7928BRU-REEL7 Просмотр технического описания (PDF) - Analog Devices
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AD7928BRU-REEL7 Datasheet PDF : 24 Pages
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AD7908/AD7918/AD7928
AD7908–SPECIFICATIONS (AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless
otherwise noted.)
Parameter
DYNAMIC PERFORMANCE
Signal-to-(Noise + Distortion) (SINAD)2
Signal-to-Noise Ratio (SNR)2
Total Harmonic Distortion (THD)2
Peak Harmonic or Spurious Noise
(SFDR)2
Intermodulation Distortion (IMD)2
Second Order Terms
Third Order Terms
Aperture Delay
Aperture Jitter
Channel-to-Channel Isolation2
Full Power Bandwidth
DC ACCURACY2
Resolution
Integral Nonlinearity
Differential Nonlinearity
0 V to REFIN Input Range
Offset Error
Offset Error Match
Gain Error
Gain Error Match
0 V to 2 ϫ REFIN Input Range
Positive Gain Error
Positive Gain Error Match
Zero Code Error
Zero Code Error Match
Negative Gain Error
Negative Gain Error Match
ANALOG INPUT
Input Voltage Ranges
DC Leakage Current
Input Capacitance
REFERENCE INPUT
REFIN Input Voltage
DC Leakage Current
REFIN Input Impedance
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN3
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance3
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time
Throughput Rate
B Version1
49
49
–66
–64
–90
–90
10
50
–85
8.2
1.6
Unit
dB min
dB min
dB max
dB max
dB typ
dB typ
ns typ
ps typ
dB typ
MHz typ
MHz typ
Test Conditions/Comments
fIN = 50 kHz Sine Wave, fSCLK = 20 MHz
fa = 40.1 kHz, fb = 41.5 kHz
fIN = 400 kHz
@ 3 dB
@ 0.1 dB
8
±0.2
±0.2
±0.5
±0.05
±0.2
±0.05
±0.2
±0.05
±0.5
±0.1
±0.2
±0.05
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
Guaranteed No Missed Codes to 8 Bits
Straight Binary Output Coding
–REFIN to +REFIN Biased about REFIN with
Twos Complement Output Coding
0 to REFIN
0 to 2 ϫ REFIN
±1
20
V
V
µA max
pF typ
RANGE Bit Set to 1
RANGE Bit Set to 0, AVDD/VDRIVE = 4.75 V to 5.25 V
2.5
±1
36
0.7 ϫ VDRIVE
0.3 ϫ VDRIVE
±1
10
V
µA max
k⍀ typ
V min
V max
µA max
pF max
±1% Specified Performance
fSAMPLE = 1 MSPS
Typically 10 nA, VIN = 0 V or VDRIVE
VDRIVE – 0.2
0.4
V min
V max
±1
µA max
10
pF max
Straight (Natural) Binary
Twos Complement
ISOURCE = 200 µA, AVDD = 2.7 V to 5.25 V
ISINK = 200 µA
Coding Bit Set to 1
Coding Bit Set to 0
800
ns max
16 SCLK Cycles with SCLK at 20 MHz
300
ns max
Sine Wave Input
300
ns max
Full-Scale Step Input
1
MSPS max See Serial Interface Section
–2–
REV. A
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