A64S06162A Просмотр технического описания (PDF) - AMIC Technology

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A64S06162A

16M(1M x 16bit) Normal mode & Page mode with Deep Power Down Static Random Access Memory

AMIC Technology 

Preliminary

PAGE READ CYCLE (/PD = /WE = VIH)

tRC

Address (A2-A19)

Page Corresponding (A0-A1)

Addresses

tAA

tCO

/CS

tAS tLZ(2)

/UB,/LB

tBA

tPRC

tPAA

tOE

/OE

DATA OUT

A64S06162A

tP(5)

tHZ(1,2)

tOHZ(1)

Note (PAGE MODE READ CYCLE) :

1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are

not referenced to output voltage levels

2. At any given temperature and voltage condition, tHZ(max.) is less than tLZ(min.) both for a given

device and from device to device.

3. /WE is high for the read cycle.

4. Do not access device with cycle timing shorter than tRC for continuous periods > 16us.

5. tP (precharge time) should be guaranteed for new Address.

6. After initial page access is accomplished, the page mode operation provides fast read access speed of

random locations within that page

(May, 2005, Version 0.0)

9

AMIC Technology, Corp.

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