74LVC3G34(2007) Просмотр технического описания (PDF) - NXP Semiconductors.
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74LVC3G34 Datasheet PDF : 14 Pages
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NXP Semiconductors
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
12. AC waveforms
74LVC3G34
Triple buffer
VI
nA input
GND
VOH
tPLH
nY output
VOL
VM
VM
VM
tPHL
VM
mnb072
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage
levels that occur with the output load.
Fig 7. The data input (nA) to output (nY) propagation
delays
VI
G
VCC
VO
DUT
RT
VEXT
RL
CL
RL
mna616
Test data is given in Table 10. Definitions for test
circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe
capacitance.
RT = Termination resistance should be equal to the
output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching
times.
Fig 8. Load circuitry for switching times
Table 9. Measurement points
Supply voltage
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Input
VM
0.5 × VCC
0.5 × VCC
1.5 V
1.5 V
0.5 × VCC
Output
VM
0.5 × VCC
0.5 × VCC
1.5 V
1.5 V
0.5 × VCC
Table 10. Test data
Supply voltage
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Input
VI
VCC
VCC
2.7 V
2.7 V
VCC
tr = tf
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
Load
CL
30 pF
30 pF
50 pF
50 pF
50 pF
RL
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
VEXT
tPLH, tPHL
open
open
open
open
open
74LVC3G34_5
Product data sheet
Rev. 05 — 5 October 2007
© NXP B.V. 2007. All rights reserved.
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