74ABT823(2010) Просмотр технического описания (PDF) - NXP Semiconductors.

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74ABT823
(Rev.:2010)

9-bit D-type flip-flop with reset and enable; 3-state

NXP Semiconductors. 

NXP Semiconductors

Table 7. Dynamic characteristics …continued

GND = 0 V; for test circuit, see Figure 9.

Symbol Parameter

Conditions

tWL

pulse width LOW CP; see Figure 5

MR; see Figure 6

trec

recovery time

MR to CP; see Figure 6

11. Waveforms

74ABT823

9-bit D-type flip-flop with reset and enable; 3-state

25 °C; VCC = 5.0 V −40 °C to +85 °C; Unit

VCC = 5.0 V ± 0.5 V

Min Typ Max Min

Max

3.8 2.8 -

3.8

- ns

5.5 4.0 -

5.5

- ns

2.5 0.6 -

2.5

- ns

VI

CP input

GND

VOH

Qn output

VOL

1 / fmax

VM

tWH

tWL

tPHL

VM

tPLH

001aac445

Fig 5.

VM = 1.5 V

VOL and VOH are typical voltage output levels that occur with the output load.

Propagation delay clock input (CP) to output (Qn), clock pulse (CP) width and maximum clock (CP)

frequency

VI

MR input

GND

VI

CP input

GND

VOH

Qn output

VOL

VM

t WL

t rec

t PHL

VM

VM

001aac446

Fig 6.

VM = 1.5 V

VOL and VOH are typical voltage output levels that occur with the output load.

Master reset (MR) pulse width, propagation delay master reset (MR) to output (Qn) and recovery time

master reset (MR) to clock (CP)

74ABT823_3

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 03 — 23 March 2010

© NXP B.V. 2010. All rights reserved.

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