W83195AR-25 Просмотр технического описания (PDF) - Winbond
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W83195AR-25 Datasheet PDF : 16 Pages
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W83195AR-25
PRELIMINARY
6.1 Register 0: CPU Frequency Select Register
Bit @PowerUp
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Pin
Description
-
SSEL3 (Frequency table selection by software via I2C )
-
SSEL2 ( Frequency table selection by software via I2C)
-
SSEL1 ( Frequency table selection by software via I2C)
-
SSEL0 ( Frequency table selection by software via I2C)
-
0 = Selection by hardware
1 = Selection by software I2C - Bit (2, 7:4)
-
SSEL4 (Frequency table selection by software via I2C )
-
SSEL5 (Frequency table selection by software via I2C )
-
0 = Running
1 = Tristate all outputs
6.2 Register 1 : CPU Clock Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
escription
7
X
- FS3#
6
X
- FS0#
5
X
- FS2#
4
1
27 24MHz(Active / Inactive)
3
1
26 48MHz(Active / Inactive)
2
1
- 1 = ±0.25% Center type Spread Spectrum Modulation
0 = ±0.5% Center type Spread Spectrum Modulation
1
0
- 0 = Normal
1 = Spread Spectrum enabled
0
1
- Reserved
6.3 Register 2: SDRAM Clock Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7
1
39 SDRAM7 (Active / Inactive)
6
1
40 SDRAM6 (Active / Inactive)
5
1
42 SDRAM5 (Active / Inactive)
4
1
43 SDRAM4 (Active / Inactive)
3
1
44 SDRAM3 (Active / Inactive)
2
1
46 SDRAM2 (Active / Inactive)
1
1
47 SDRAM1 (Active / Inactive)
0
1
48 SDRAM0 (Active / Inactive)
Publication Release Date: Jan. 2000
-8-
Revision 0.40
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