RS5C321B Просмотр технического описания (PDF) - RICOH Co.,Ltd.
Номер в каталоге
Компоненты Описание
Список матч
RS5C321B Datasheet PDF : 33 Pages
| |||
RS5C321A/B
DC CHARACTERISTICS
Unless otherwise specified: VSS=0V, VDD=3V, Topt=–40 to +85˚C, Oscillation frequency=32.768kHz,(CL=6pF, R1=30kΩ), CG=10pF
Symbol
Item
Pin name
Conditions
MIN. TYP. MAX. Unit
VIH
“H” input voltage
CE, SCLK/SCLK, SIO
0.8VDD
VDD
V
VIL
“L” input voltage
CE, SCLK/SCLK, SIO
0
0.2VDD V
IOH
“H” output current
SIO
VOH=VDD –0.5V
–0.5 mA
IOL1
SIO
“L” output current
VOL1=0.5V
0.5
mA
IOL2
32KOUT
VOL2=0.4V
1
RDN Pull-down resistance CE
45
150 450
kΩ
IILK
Input leakage current SCLK/SCLK
VI=VDD or VSS
–1
1
µA
IOZ1
Output off-state
IOZ2
leakage current
SIO
32KOUT
IDD1
Standby current 1*
VDD
IDD2
Standby current 2*
VDD
Internal oscillation
CD
capacitance
OSCOUT
VO=VDD or VSS
–2
VO=10V
–5
2
µA
5
VDD=3V
Input/Output: open
0.6
1.5
µA
VDD=6V
Input/Output: open
0.8
2.0
µA
10
pF
*) IDD1, IDD2 is specified when 32kHz output is off (CLEN=1)
AC CHARACTERISTICS
Symbol
Item
VDD≥4.5V
MIN.
MAX.
(VSS=0V, Topt=–40 to +85˚C, CL=50pF)
VDD≥4.0V
MIN.
MAX.
VDD≥2.5V
MIN.
MAX.
Unit
tCES CE set-up time
175
200
400
ns
tCEH CE hold time
175
200
400
ns
tCR CE inactive time
350
400
800
ns
tSCK SCLK clock cycle time
350
400
800
ns
tCKH SCLK high time
175
200
400
ns
tCKL SCLK low time
175
200
400
ns
tCKS SCLK to CE set-up time
60
Data output start time (from rising
tRE
of SCLK) (from falling of SCLK)
Data output delay time (from rising
tRR
of SCLK) (from falling of SCLK)
80
120
120
120
ns
135
300
ns
135
300
ns
tRZ
Output floating time
120
135
300
ns
tDS Input data set-up time
50
60
120
ns
tDH Input data hold time
50
50
80
ns
5
Share Link: 