Philips Semiconductors
Analog cordless telephone IC
Product specification
UAA2062
DATA REGISTERS AND ADDRESSES
Table 3 shows the data latches and addresses which are used to select each of the registers. bit D14 is the MSB and is
written and loaded first.
Table 3 Data register and addresses
ADDR D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
001
−
010
−
TX counter [13 to 0]
RX counter [13 to 0]
011 voltage reference
adjust [2 to 0]
Clk Div Ref IP3
[1 and 0] Div
100 test modes [2 to 0](1) LNA capacitor [3 to 0]
LNA gain
[1 and 0]
LNA RIN
[1 and 0]
RX VCO capacitor [3 to 0]
VREFPLL HLim
−
disable
FM PLL centre frequency
shift [3 to 0]
101 BD
low-battery
active detector threshold
[2 to 0]
CD threshold control [4 to 0]
RX
mute
RX gain control[4 to 0]
110 active modes PA [1 and 0]
[1 and 0]
TX VCO capacitor
selection[3 to 0]
ALC TX
disable mute
TX gain control[4 to 0]
Note
1. The three bits must be set at 000 in normal operation.
Table 4 Data register default value
ADDR D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
001 −
1
0
0
1
1
0
1
1
1
0
1
1
1
0
010 −
0
1
1
1
0
0
0
0
1
0
1
1
1
1
011 0
1
1
0
1
0
0
0
0
0
0
0
1
−
−
100 0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
101 0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
110 0
0
1
1
0
1
1
1
0
0
0
1
1
1
1
ACTIVE MODES BITS SELECTION
Table 5 Active modes bits selection
BIT 1
0
0
1
1
BIT 0
0
1
0
1
DESCRIPTION
active mode
RX mode
standby mode
inactive mode
2000 Aug 10
13