CS5516-ASZ Просмотр технического описания (PDF) - Cirrus Logic

Номер в каталоге

Компоненты Описание

Список матч

CS5516-ASZ

16/20-bit bridge transducer A/D conveter

Cirrus Logic 

CS5516, CS5520

bits can be manipulated by the user to add or

subtract offset up to 200 percent of the nominal

input signal. The AIN ratiometric offset register

can be manipulated to add or subtract offset

equal to the maximum differential input signal

into the X25 amplifier. An LSB in the ratiomet-

ric offset register represents 2-23 proportion of

the voltage input across the VREF+ and VREF-

pins at the internal input to the AIN channel

A/D converter. This will be scaled down by the

AIN channel gain when calculated relative to the

instrumentation amplifier input. For example,

with a VREF = 2.5 V, the PGA gain = 1, one

count of the ratiometric offset register would

represent about 12 nV at the instrumentation am-

plifier input. The proportion remains ratiometric

even if the VREF voltage should change. The

24-bit register content is stored in 2’s comple-

ment form.

Manipulation of the DAC or ratiometric offset

register allows the user to shift the transfer func-

tion to allow for load cell creep or load cell zero

drift.

The gain calibration is performed last. The con-

tents of the gain register spans from 2-23 to 2 as

shown in Table 4. After gain calibration has

been performed, the numeric value in the gain

register should not exceed the range of 0.8 to

1.2. The gain calibration range is ± 20 % of the

nominal value of 1.0. The nominal value of 1.0

is for an input span dictated by the VREF volt-

age, the PGA gain, and the X25 instrumentation

gain. The converter may operate with gain slope

factors from 0.5 to 2.0 (decimal), but when the

slope exceeds 1.2 the converter output code

computation may lack adequate resolution and

result in missing codes in the transfer function.

Internal circuitry may saturate for large signals

which would calibrate to a gain factor less than

0.8.

In a typical weigh scale application, the

CS5516/CS5520 will be calibrated in combina-

tion with a load cell at the factory. Once

calibrated, the calibration words are off-loaded

from the converter and stored in E2PROM.

When powered-up in the field the calibration

words are up-loaded into the appropriate regis-

ters. This is viable because the AIN and VREF

input to the converter are "chopper-stabilized"

and maintain excellent stability when subjected

to changes in temperature.

Programmable Gain Amplifier

The programmable gain amplifier inside the

CS5516/20 offers gains of 1, 2, 4, and 8. This is

in addition to the fixed gain of × 25 in the input

instrumentation amplifier. The gain tracking of

the PGA is about one percent between ranges.

The user can remove this error by performing a

gain calibration at the factory with a full scale

signal on each range. The gain calibration word

for each gain range can be off-loaded into

E2PROM and uploaded into the gain register

whenever a new gain setting is selected for the

PGA. Gain stability over temperature for the

converter itself is approximately 1 ppm/°C when

the device is used ratiometrically.

Serial Interface Modes

The CS5516/20 support either 5, 4 or 3 pin se-

rial interfacing. The SMODE pin sets the

operating mode of the serial interface. With

SMODE = 0, the device assumes the user is op-

erating with either a 5 or 4 wire interface. The

five wire mode includes SOD, SID, SCLK,

DRDY, and CS. In the four wire mode, CS is

connected to DGND as a logic 0. The user

would then interface to the SOD, SID, SCLK,

and DRDY pins.

DS74F21

17

Share Link: