HN29V1G91T-30 Просмотр технического описания (PDF) - Renesas Electronics

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HN29V1G91T-30

128M × 8-bit AG-AND Flash Memory

Renesas Electronics 

HN29V1G91T-30

Block Diagram

16

Page address buffer

Bank0

Bank Bank

1

2

Bank3

X-

decoder

Memory array

(2048+64)

x 16384 page

16

I/O1

to

I/O8

Multi-

plexer

8 Data

input

buffer

8

Data register

2048+64 byte

Y-Gating

Y-Decoder

VCC

Input data

control

VSS

8

12

Column address

counter

R/B

CE

RE

WE

WP

CLE

ALE

PRE

RES

Control

signal

buffer

Read/Program/Erase

control

X-

decoder

Memory array

(2048+64)

x 16384 page

Data register

2048+64 byte

Y-Gating

Y-Decoder

Data

output buffer

Rev.4.00, Jun.20.2004, page 4 of 89

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