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PVG610

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PVG610

Data Sheet

Figure 99: ADC Differential DC Coupled Connection ...............................................................................................149

Figure 100: ADC Differential AC Coupled Connection .............................................................................................149

Figure 101: ADC Differential AC Coupled Connection .............................................................................................152

Figure 102: DAC Differential Connection..................................................................................................................155

Figure 103: Envelop Detector ADC Connection .......................................................................................................158

Figure 104: DC Correction Timing ............................................................................................................................161

Figure 105: Receive External ADC Timing ...............................................................................................................162

Figure 106: Transit External DAC Timing .................................................................................................................163

Figure 107: Connecting Protection System with Parallel Protection Bus .................................................................164

Figure 108: Connecting Protection System with SERDES Devices .........................................................................164

Figure 109: Protection Bus Timing Diagrams ...........................................................................................................166

Figure 110: Using XPIC Interface in XPIC Configuration .........................................................................................167

Figure 111: XPIC Interface Timing Diagrams ...........................................................................................................168

Figure 112: JTAG Timing ..........................................................................................................................................172

Figure 113: Injection bus diagram.............................................................................................................................173

Figure 114: Injection BUS Timing .............................................................................................................................173

Figure 115: Test BUS Timing....................................................................................................................................175

Figure 116: SNR for 1E-6 BER as a function of spectral efficiency (Based on simulations)....................................176

Figure 117: 680 Ball POD Dimensions .....................................................................................................................187

Figure 118: 680 Ball POD Bottom View....................................................................................................................188

Figure 119: Packaging Notes From mechanical Drawing.........................................................................................189

List of Tables

Table 1: VLAN TAG Format ........................................................................................................................................ 55

Table 2: Transport Overhead (TOH) Bytes Description.............................................................................................. 59

Table 3: List of Tributaries........................................................................................................................................... 64

Table 4: Number of symbols per LDPC block............................................................................................................. 73

Table 5: Number of symbols per LDPC block (Multi level) ......................................................................................... 73

Table 6: Net Convolution Puncture Rate .................................................................................................................... 74

Table 7: Convolutional Code Puncture Rates............................................................................................................. 74

Table 8: List of Codes supported by the ICD Modules ............................................................................................... 83

Table 9: LDPC Code Rates......................................................................................................................................... 85

Table 10: Boot Options ............................................................................................................................................... 98

Table 11: E1/T1/J1 Signals – Pin Sharing Signal List ..............................................................................................100

Table 12: MII Signals - Pin Sharing Signal List.........................................................................................................101

Table 13: STM-1 Signals - Pin Sharing Signal List...................................................................................................102

Table 14: GPI Signals - Pin Sharing Signal List .......................................................................................................103

Table 15: Host Signals - Pin Sharing Signal List ......................................................................................................104

Table 16: SPI Signals - Pin Sharing Signal List........................................................................................................105

Table 17: OMI and HDLC Pin Sharing......................................................................................................................106

Table 18: DC Correction and SPI Pin Sharing..........................................................................................................106

Table 19: Protection and GPIO Pin Sharing .............................................................................................................106

Table 20: SDRAM Signals - Pin Sharing Signal List.................................................................................................107

Table 21: GPIO Signals - Pin Sharing Signal List.....................................................................................................107

Table 22: Injection Bus, ADC/DAC Signals - Pin Sharing Signal List.......................................................................108

Table 23: Receiver Characteristics for E1 Links .......................................................................................................110

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9

PVG610A_DSH_002_I3

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