CXB1454R Просмотр технического описания (PDF) - Sony Semiconductor
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CXB1454R Datasheet PDF : 17 Pages
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CXB1454R
Tab. 2. Digital Signals
Pin Name Pin Number Type
Descriptions
SFTCLK
51
Shift clock, for the data
TTL out fetch at falling or rising
edge
RED (7 to 0) 18, 19, 22, 23,
24, 25, 30, 31,
GRN (7 to 0)
6, 7, 10, 11,
12, 13, 14, 15,
TTL out
BLU (7 to 0) 58, 59, 62, 63,
2, 3, 4, 5
Pixel data
HSYNC
56
TTL out Hsync data
VSYNC
57
TTL out Vsync data
CNTL
49
TTL out Control data
DE
50
TTL out Display enable data
LOS
36
TTL out Los of signal
PANEL (1, 0) 35, 34
CLKPOL
32
TTL in Panel mode select switch
VCCT
TTL in Trigger edge select switch
Equivalent circuit
VCCT
TTL-OUT
VEET
VCCG
6k
6k
TESTEXN 43,
TESTDT
37,
TESTSB
38
TTL-IN
TTL in Reserved for TEST under
300
fabrication
VEET
VEEG
VCCG
SDATAP/N 40, 41
Rx
Serial input
REFRQP/N 39, 42
Rx
Refclk request
SDATAP/N
REFRQP/N
VEEG
–3–
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