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UT1553B/BCRT-ACA0

UT1553B BCRT bus controller/remote terminal/monitor. Lead finish optional. Total dose none.

Aeroflex UTMC 

CONTROL SIGNALS

NAME

RD

PIN NUMBER

LCC/FP

PGA

132 FP

61

B7

79

WR

60

C7

77

CS

62

A7

81

AEN

66

A5

86

BCRTSEL

11

L1

131

LOCK

12

K2

2

EXTOVR

24

L7

20

MRST

10

MEMCSO

54

32

130

B10

68

MEMCSI

59

A8

75

RRD

53

A11

65

RWR

52

C10

64

TYPE

TI

TI

TI

TI

TUI

TUI

TUI

TI

TO

TUI

TO

TO

ACTIVE

AL

AL

AL

AH

--

AH

AL

AL

AL

AL

AL

AL

DESCRIPTION

Read. The host uses this in conjunction

with CS to read an internal BCRT register.

Write. The host uses this in conjunction

with CS to write an internal BCRT

register.

Chip Select. This selects theBCRT when

accessing the BCRT’s internal register.

Address Enable. The hostCPU uses AEN

to indicate to the BCRT that the BCRT’s

addresslines can be asserted; this is a

precautionary signal provided to avoid

address bus crash. If not used, it must be

tied high.

BC/RT Select. This selects between

either the Bus Controller or Remote Ter-

minal mode. The BC/RT Mode Select bit

in the Control Register overrides this

input if the Lock pin is not high. This pin

is internally pulled high.

Lock. When set, this pin prevents inter-

nal changes to both the RT address and

BC/RT mode select functions. This pin is

internally pulled high.

External Override. Use this in multi-

redundant applications. Upon receipt, the

BCRT aborts all current activity.

EXTOVR should be connected to COM-

STR output of the adjacent BCRT when

used. This pin is internally pulled high.

Master Reset. This resets all internal

state machines, encoders, decoders, and

registers. The minimum pulse width for a

successful Master Reset is 500ns.

Memory Chip Select Out. This is the

regenerated MEMCSI inout for external

RAM during the pseudo-dual-port RAM

mode. The BCRT also uses it to select

external memory during memory

accesses.

Memory Chip Select In. Used in the

pseudo-dual-port RAM mode only,

MEMCSI is received from the host and

is propagated through to MEMCSO.

RAM Read. In the pseudo-dual-port

RAM mode, the host uses this signal in

conjunction with MEMCSO to read from

external RAM through the BCRT. It is

also the signal the BCRT uses to read

from memory. It is asserted following

receipt of DMAG. When the BCRT per-

forms multiple reads, this signal is

pulsed.

RAM Write. In the pseudo-dual-port

RAM mode, the CPU and BCRT use this

to write to external RAM. This signal is

asserted following receipt of DMAG. For

multiple writes, this signal is pulsed.

BCRT-8

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