FW323-05 Просмотр технического описания (PDF) - Agere -> LSI Corporation

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FW323-05

1394A PCI PHY/Link Open Host Controller Interface

Agere -> LSI Corporation 

FW323 05

1394A PCI PHY/Link Open Host Controller Interface

FW323 Functional Description (continued)

Data Sheet, Rev. 2

October 2001

CPS

LPS

SYSCLK

LREQ

CTL0

CTL1

D0

D1

D2

D3

D4

D5

D6

D7

LINKON

PC0

PC1

PC2

CONTENDER

SE

SM

LINK

INTERFACE

I/O

RECEIVED

DATA

DECODER/

RETIMER

BIAS

VOLTAGE

R0

AND

CURRENT

R1

GENERATOR

ARBITRATION

AND

CONTROL

STATE

MACHINE

LOGIC

CABLE PORT 0

TPA0+

TPA0–

TPBIAS0

TPB0+

TPB0–

RESETN

TRANSMIT

DATA

ENCODER

CABLE PORT 1

CABLE PORT 2

CRYSTAL

OSCILLATOR,

PLL SYSTEM,

AND

CLOCK

GENERATOR

Figure 2. The PHY Core Block Diagram

TPA1+

TPA1–

TPBIAS1

TPB1+

TPB1–

TPA2+

TPA2–

TPBIAS2

TPB2+

TPB2–

XI

XO

5-5459.i(F) R.01

12

Agere Systems Inc.

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