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W83194BR-39B

STEP-LESS 3-DIMM CLOCK

Winbond 

W83194BR-39B

4.3 I2C Control Interface

SYMBOL

PIN

SDATA*

23

SDCLK*

24

PRELIMINARY

I/O

FUNCTION

I/O Serial data of I2C 2-wire control interface

IN Serial clock of I2C 2-wire control interface

4.4 Fixed Frequency Outputs

SYMBOL

PIN

REF0^ / PD#

2

REF1 / FS2*

46

24MHz / FS1*

25

48MHz / FS0*

26

I/O

FUNCTION

I/O 14.318MHz reference clock. This REF output is the

stronger buffer for ISA bus loads.(pin7 *Mode0=1)

Halt all clocks at logic 0 level, when input low (pin7

*Mode0=0)

I/O 14.318MHz reference clock.

Latched input for FS2 at initial power up for H/W

selecting the output frequency of CPU, SDRAM and

PCI clocks.

I/O 24MHz output clock.

Latched input for FS1 at initial power up for H/W

selecting the output frequency of CPU, SDRAM and

PCI clocks.

I/O 48MHz output for USB during normal operation.

Latched input for FS0 at initial power up for H/W

selecting the output frequency of CPU, SDRAM and

PCI clocks.

4.5 Power Pins

SYMBOL

Vddq1

VddL1

VddL2

Vddq2

Vddq3

Vddq4

Vss

PIN

FUNCTION

1

Power supply for Ref [0:1] crystal and core logic.

48

Power supply for IOAPIC output, either 2.5V or 3.3V.

42

Power supply for CPUCLK[0:3], either 2.5V or 3.3V.

6, 14

Power supply for PCICLK_F, PCICLK[0:4], 3.3V.

19, 30, 36

Power supply for SDRAM[0:12], and CPU PLL core,

nominal 3.3V.

27

Power for 24 & 48MHz output buffers and fixed PLL

core.

3,9,16,22,33,39,45 Circuit Ground.

Publication Release Date: June 2000

-4-

Revision 0.46

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