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W83194BR-39B

STEP-LESS 3-DIMM CLOCK

Winbond 

& - Internal 120KΩ pull-down

* - Internal 120kΩ pull-up

W83194BR-39B

PRELIMINARY

4.1 Crystal I/O

SYMBOL

Xin

Xout

PIN

I/O

FUNCTION

4

IN Crystal input with internal loading capacitors and

feedback resistors.

5

OUT Crystal output at 14.318MHz nominally.

4.2 CPU, SDRAM, PCI, IOAPIC Clock Outputs

SYMBOL

CPUCLK_F

CPUCLK1

RESET#

IOAPIC

SDRAM [ 0:12]

PCICLK_F/

*MODE0

PCICLK0^/FS3&

PCICLK [1:3]^

PCICLK 4

BUFFER IN

PIN

44

43

41

47

17,18,20,21,28

,29,31,32,34,

35,37,38,40

7

8

10,11,12,13

15

I/O

OUT

OUT

OD

OUT

OUT

I/O

I/O

OUT

IN

FUNCTION

Free running CPU clock. Not affected by PD#

Low skew (< 250ps) clock outputs for host

frequencies such as CPU, Chipset and Cache.

Powered by VddL2. Low if PD# is low.

RESET# (open drain, 4ms low active pulse when

Watch Dog time out)

High drive buffered output of the crystal, and is

powered by VddL1.

SDRAM clock outputs. Fanout buffer outputs from

BUFFER IN pin.(Controlled by chipset)

Free running PCI clock during normal operation.

Latched Input. *Mode0=1, Pin 2 is REF0; *Mode0=0,

Pin2 is PD#

Low skew (< 250ps) PCI clock outputs.

Latched input for FS3 at initial power up for H/W

selecting the output frequency of CPU and PCI

clocks.

Low skew (< 250ps) PCI clock outputs.

PCICLK 0:3 are double strength pins

PCICLK 4 is not.

Inputs to fanout for SDRAM outputs.

Publication Release Date: June 2000

-3-

Revision 0.46

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