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W199 Просмотр технического описания (PDF) - Cypress Semiconductor

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W199 Datasheet PDF : 14 Pages
First Prev 11 12 13 14
PRELIMINARY
W199
48-MHz Clock Output (Lump Capacitance Test Load = 20 pF)
Parameter
Description
Test Condition/Comments
f
Frequency, Actual
Determined by PLL divider ratio (see m/n below)
fD
Deviation from 48 MHz (48.008 48)/48
m/n
PLL Ratio
(14.31818 MHz x 57/17 = 48.008 MHz)
tR
Output Rise Edge Rate Measured from 0.4V to 2.4V
tF
Output Fall Edge Rate Measured from 2.4V to 0.4V
tD
Duty Cycle
Measured on rising and falling edge at 1.5V
fST
Frequency Stabilization Assumes full supply voltage reached within 1 ms from
from Power-up (cold
power-up. Short cycles exist prior to frequency
start)
stabilization.
Zo
AC Output Impedance Average value during switching transition. Used for de-
termining series termination value.
Min. Typ. Max.
48.008
+167
57/17
0.5
2
0.5
2
45
55
3
Unit
MHz
ppm
V/ns
V/ns
%
ms
40
24-MHz Clock Output (Lump Capacitance Test Load = 20 pF)
Parameter
Description
Test Condition/Comments
f
Frequency, Actual
Determined by PLL divider ratio (see m/n below)
fD
Deviation from 24 MHz (24.004 24)/24
m/n
PLL Ratio
(14.31818 MHz x 57/34 = 24.004 MHz)
tR
Output Rise Edge Rate Measured from 0.4V to 2.4V
tF
Output Fall Edge Rate Measured from 2.4V to 0.4V
tD
Duty Cycle
Measured on rising and falling edge at 1.5V
fST
Frequency Stabiliza- Assumes full supply voltage reached within 1 ms from
tion from Power-up
power-up. Short cycles exist prior to frequency stabili-
(cold start)
zation.
Zo
AC Output Impedance Average value during switching transition. Used for de-
termining series termination value.
Min.
0.5
0.5
45
Typ.
24.004
+167
57/34
Max.
2
2
55
3
40
Unit
MHz
ppm
V/ns
V/ns
%
ms
Ordering Information
Ordering Code
Package
Name
W199
H
Document #: 38-00858
Package Type
48-Pin SSOP (300-mil)
13

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