TDA10085HT Просмотр технического описания (PDF) - Philips Electronics
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TDA10085HT Datasheet PDF : 16 Pages
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Philips Semiconductors
Single chip DVB-S/DSS channel receiver
Product specification
TDA10085HT
6 PINNING
SYMBOL
PIN
XIN
1
XOUT
2
VDDI
3
PLLVCC
4
PLLGND
5
DGND
6
DVCC
7
VDDI
8
VSSI
9
VDD3
10
AVS
11
VIN2
12
VREFN
13
VREFP
14
VIN1
15
AVD
16
SADDR0
17
TMD
18
ENSERI
19
IICDIV
20
CTRL1
21
CTRL2
22
VSSE
23
VDDE5
24
VSSI
25
2001 Aug 31
TYPE
I
I
supply
supply
ground
ground
supply
supply
ground
supply
ground
I
O
O
I
supply
I
I
I
I
OD
OD
ground
supply
ground
DESCRIPTION
crystal oscillator input and output pins; in a typical application, a
fundamental oscillator crystal is connected between pins XIN and
XOUT; see note 1
digital core supply voltage (typically 1.8 V)
analog supply voltage for the PLL (typically 3.3 V)
analog ground for the PLL
digital PLL core ground voltage; see note 2
digital PLL core supply voltage (typically 1.8 V)
digital ADC supply voltage (typically 1.8 V)
digital ADC ground voltage; see note 2
analog ADC supply voltage (typically 3.3 V)
analog ground voltage
analog signal input for channel Q; see note 1
negative analog voltage reference output (typically 1.25 V); a
decoupling capacitor (typically 0.1 µF) must be placed as close as
possible between VREFN and GND
positive analog voltage reference output (typically 2 V); a decoupling
capacitor (typically 0.1 µF) must be placed as closed as possible
between VREFP and GND
analog signal input for channel I; see note 1
analog supply voltage (typically 3.3 V); a 0.1 µF decoupling capacitor
must be placed between AVD and AVS
SADDR0 input signal is the LSB of the I2C-bus address of the
TDA10085; other bits of the address are set internally to 000111,
therefore the complete I2C-bus address is (MSB to LSB):
0, 0, 0, 1, 1, 1 plus the SADDR0 bit; see note 1
test input; must be connected to ground for normal operation; see
note 1
enable serial interface input; when HIGH, the serial transport stream
is present on the boundary scan pins (TRST, TDO, TCK, TDI
and TMS); when LOW, the boundary scan pins are available; note 1
input to select the I2C-bus internal system clock frequency (depends
on the crystal frequency); internal I2C-bus clock is XIN when
IICDIV = 0 and XIN/4 if IICDIV = 1; see note 1
control line output 1; this pin function is directly programmable
through the I2C-bus interface; default value is logic 1; open-drain
output requiring an external pull-up resistor to 3.3 V or to 5 V
control line output 2; this pin function is directly programmable
through the I2C-bus interface; default value is logic 1; open-drain
output requiring an external pull-up resistor to 3.3 V or to 5 V
digital ground voltage; see note 2
digital 5 V supply voltage; required for the 5 V tolerance of inputs
digital core ground voltage; see note 2
5
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