PM7324 Просмотр технического описания (PDF) - PMC-Sierra
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PM7324 Datasheet PDF : 473 Pages
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S/UNI-ATLAS
DATASHEET
PMC-1971154
9
10
11
12
PM7324 S/UNI-ATLAS
ISSUE 7
S/UNI-ATM LAYER SOLUTION
8.18 F4 TO F5 OAM PROCESSING .................................................................................... 115
8.19 F5 TO F4 OAM PROCESSING .................................................................................... 124
8.20 RESOURCE MANAGEMENT CELLS .......................................................................... 129
8.21 S/UNI-ATLAS BACKGROUND PROCESSES.............................................................. 129
8.22 INGRESS BACKWARD OAM CELL INTERFACE........................................................ 131
8.23 EGRESS BACKWARD OAM CELL INTERFACE......................................................... 131
8.24 JTAG TEST ACCESS PORT........................................................................................ 132
8.25 MICROPROCESSOR INTERFACE.............................................................................. 132
8.26 EXTERNAL SRAM ACCESS........................................................................................ 132
8.27 WRITING CELLS.......................................................................................................... 133
8.28 READING CELLS ......................................................................................................... 134
8.29 ATLAS DLL CLOCK OPERATION ............................................................................... 138
NORMAL MODE REGISTER MEMORY MAP ............................................................................ 139
9.1
NORMAL MODE REGISTER DESCRIPTION .............................................................. 147
TEST FEATURES DESCRIPTION ............................................................................................. 407
10.1 TEST MODE 0 DETAILS.............................................................................................. 410
10.2 JTAG TEST PORT ....................................................................................................... 410
OPERATION............................................................................................................................... 415
11.1 SCI-PHY EXTENDED CELL FORMAT......................................................................... 415
11.2 SYNCHRONOUS STATIC RAMS ................................................................................ 417
11.2.1 INGRESS VC-TABLE SRAM ......................................................................... 417
11.2.2 EGRESS VC-TABLE SRAM........................................................................... 418
11.3 ATM CELL PROCESSING ........................................................................................... 419
11.3.1 OAM CELL FORMAT ..................................................................................... 419
11.4 INGRESS VC IDENTIFICATION SEARCH ALGORITHM ............................................ 421
11.4.1 OVERVIEW .................................................................................................... 422
11.4.2 INGRESS PERFORMANCE MONITORING ACTIVATION / DEACTIVATION428
11.5 EGRESS VC TABLE OPERATION .............................................................................. 428
11.5.1 INITIALIZATION PROCEDURE ..................................................................... 428
11.5.2 CONNECTION SETUP .................................................................................. 429
11.5.3 EGRESS PERFORMANCE MONITORING ACTIVATION / DEACTIVATION 430
11.6 JTAG SUPPORT .......................................................................................................... 431
11.6.1 TAP CONTROLLER....................................................................................... 432
FUNCTIONAL TIMING ............................................................................................................... 436
12.1 INGRESS INPUT CELL INTERFACE........................................................................... 436
12.2 INGRESS OUTPUT CELL INTERFACE....................................................................... 439
12.3 EGRESS INPUT CELL INTERFACE............................................................................ 441
12.4 EGRESS OUTPUT CELL INTERFACE........................................................................ 444
PROPRIETARY AND CONFIDENTIAL
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