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CXA2079Q Просмотр технического описания (PDF) - Sony Semiconductor

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CXA2079Q Datasheet PDF : 20 Pages
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CXA2079Q
Status register structure (DATA1 and DATA2)
Slave add.
DATA1
DATA2
b7
1
S1SEL
S1SEL
b6
0
S2SEL
S2SEL
b5
0
S3SEL
S3SEL
b4
1
S4SEL
S4SEL
b3
b2
0
0
S-C1
S-C3
b1
b0
ADR
1
S-C2
S-C4
S1SEL to S4SEL (1 each): S-1 to S-4 pin status
0: S-1 to S-4 pins are not grounded.
1: S-1 to S-4 pins are grounded.
S1SEL to S4SEL are actually determined by comparing the S-1 to S-4 pin DC voltages with 3.5V.
S-1 to S-4 pin DC voltage
3.5V or more
3.5V or less
S1SEL to S4SEL
0
1
S-C1, S-C2, S-C3, S-C4 (2 each): S2-1, S2-2, S2-3 and S2-4 pin status
0: 4:3 video signal
1: 4:3 letter-box signal
2: 16:9 video squeezed signal
3: No signal
S-C1 to S-C4 are actually determined by comparing the S2-1 to S2-4 pin DC voltages with two
threshold. However, when the S-1 to S-4 pins are open, the outputs are fixed to "3".
S2-1 to S2-4 pin DC voltage
1.3V or less
1.3V or more to 2.5V or less
2.5V or more
S-1 to S-4 OPEN
S-C1 to S-C4
0
1
2
3
4) Power-on Reset
The CXA2079Q has an internal power-on reset function that sets each control register to "0" during IC power
ON.
The power-on reset VTH has hysteresis.
Power-on reset
released
Power-on reset
4.5V
– 17 –
VCC
5.6V

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