CS4955-CQ Просмотр технического описания (PDF) - Cirrus Logic

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CS4955-CQ

NTSC/PAL Digital Video Encoder

Cirrus Logic 

CS4954 CS4955

NTSC Vertical Timing (odd field)

Line

HSYNC

3

4

5

6

7

8

9

10

VSYNC

FIELD

NTSC Vertical Timing (even field)

Line

HSYNC

264

265

266

267

268

269

270

271

VSYNC

FIELD

PAL Vertical Timing (odd field)

Line

HSYNC

265

1

2

3

4

5

6

7

VSYNC

FIELD

PAL Vertical Timing (even field)

Line

HSYNC

311

312

313

314

315

316

317

318

VSYNC

FIELD

Figure 6. Vertical Timing

VSYNC stays low for 2.5 line-times and transitions commonly support progressive scan by repetitively

high with the beginning of line 315. Video input on displaying a 262 line field (524/525 lines for

the V [7:0] pins is expected between line 336 NTSC). The common method is flawed: over time,

through line 622.

the output display rate will overrun a system-clock-

5.2.7. Progressive Scan

locked MPEG-2 decompressor and display a field

twice every 8.75 seconds.

The CS4954/5 supports a progessive scan mode in

which the video output is non-interlaced. This is 5.2.8. NTSC Progressive Scan

accomplished by displaying only the odd video VSYNC will transition low at line four to begin

field for NTSC or PAL. To preserve precise field one and will remain low for three lines or

MPEG-2 frame rates of 30 and 25 per second, the 2574 pixel cycles (858 × 3). NTSC interlaced tim-

CS4954/5 displays the same odd field repetitively ing is illustrated in Figure 9. In this mode, the

but alternately varies the field times. This mode is CS4954/5 expects digital video input at the V [7:0]

in contrast to other digital video encoders, which

DS278PP4

17

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