Architecture Overview
The QL5064 device in the QuickLogic QuickPCI ESP (Embedded Standard Products) family provides a complete and customizable PCI interface solution combined with 74,000 system gates of programmable logic. This device eliminates any need for the designer to worry about PCI bus compliance, yet allows for the maximum possible PCI bus bandwidth.
The programmable logic portion ofthe device is built from 792 QuickLogic Logic Cells, and 11
QuickLogic Dual-Port RAM Blocks. The configurable RAM blocks can each operate in 64x18, 128x9,
256x4, or 512x2 mode. These dual-port RAM blocks can be cascaded to achieve deeper or wider
configurations. They can also be combined with logic cells to form FIFOs. See the RAM section of this data sheet for more information.

APPLICATIONs
The QL5064 device supports maximum PCI transfer rates, so many applications exist which are ideally suited to the device's high performance. High speed data  communications, telecommunications, and computing systems are just a few of the broad range of applications areas that can benefit from the high speed PCI interface and programmable logic.
The PCI Interface can also act as a PCI Host Controller. This can be accomplished by glue-less interface to most popular 8/16/32/64-bit microprocessors.