CS493122-CL Просмотр технического описания (PDF) - Cirrus Logic
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CS493122-CL Datasheet PDF : 90 Pages
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CS49300 Family DSP
1.9. Switching Characteristics — Motorola® Host Mode
(VA, VD[3:1] = 2.5 V ±5%; Inputs: Logic 0 = DGND, Logic 1 = VD, CL = 20 pF)
Parameter
Symbol
Min
Address setup before CS and DS low
Tmas
5
Address hold time after CS and DS low
Tmah
5
Delay between DS then CS low or CS then DS low
Tmcdr
0
Data valid after CS and DS low with R/W high
(Note 3) Tmdd
-
Max
Unit
-
ns
-
ns
∞
ns
21
ns
CS and DS low for read
(Note 1) Tmrpw
DCLKP + 10
-
ns
Data hold time after CS or DS high after read
Tmdhr
5
-
ns
Data high-Z after CS or DS high after read
(Note 2) Tmdis
-
22
ns
CS or DS high to CS and DS low for next read
(Note 1) Tmrd 2*DCLKP + 10
-
ns
CS or DS high to CS and DS low for next write
(Note 1) Tmrdtw 2*DCLKP + 10
-
ns
Delay between DS then CS low or CS then DS low
Tmcdw
0
∞
ns
Data setup before CS or DS high
Tmdsu
20
-
ns
CS and DS low for write
(Note 1) Tmwpw DCLKP + 10
-
ns
R/W setup before CS AND DS low
Tmrwsu
5
-
ns
R/W hold time after CS or DS high
Tmrwhld
5
-
ns
Data hold after CS or DS high
Tmdhw
5
-
ns
CS or DS high to CS and DS low with R/W high for next read Tmwtrd 2*DCLKP + 10
-
ns
(Note 1)
CS or DS high to CS and DS low for next write
(Note 1) Tmwd 2*DCLKP + 10
-
ns
Notes: 1. Certain timing parameters are normalized to the DSP clock, DCLKP, in nanoseconds. DCLKP =
1/DCLK. The DSP clock can be defined as follows:
External CLKIN Mode:
DCLK == CLKIN/4 before and during boot
DCLK == CLKIN after boot
Internal Clock Mode:
DCLK == 10MHz before and during boot, i.e. DCLKP == 100ns
DCLK == 65 MHz after boot, i.e. DCLKP == 15.4ns
It should be noted that DCLK for the internal clock mode is application specific. The application code
users guide should be checked to confirm DCLK for the particular application.
2. This specification is characterized but not production tested. A 470 ohm pull-up resistor was used for
characterization to minimize the effects of external bus capacitance.
3. See Tmdd from Motorola Host Mode in Table 7 on page 47
12
DS339F7
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