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W83627F-AW

Winbond LPC I/O

Winbond 

W83627HF/ F/ HG/ G

PIN DESCRIPTION, continued.

TYPE

DESCRIPTION

INt

TTL level input pin

INtp3

3.3V TTL level input pin

INtd

TTL level input pin with internal pull down resistor

INtu

TTL level input pin with internal pull up resistor

INts

TTL level Schmitt-trigger input pin

INtsp3 3.3V TTL level Schmitt-trigger input pin

INc

CMOS level input pin

INcd

CMOS level input pin with internal pull down resistor

INcs

CMOS level Schmitt-trigger input pin

INcsu

CMOS level Schmitt-trigger input pin with internal pull up resistor

Note： Please refer to Section 11.2 DC CHARACTERISTICS for details.

6.1 LPC Interface

SYMBOL

PIN

I/O

CLKIN

18

INt3

PME#

PCICLK

LDRQ#

SERIRQ

LAD[3：0]

LFRAME#

LRESET#

SUSCLKIN

19

21

22

23

24-27

29

30

75

OD12p3

INtsp3

O12p3

I/O12tp3

I/O12tp3

INtsp3

INtsp3

INtsp3

FUNCTION

System clock input. According to the input frequency 24MHz or

48MHz, it is selectable through register. Default is 24MHz in-

put.

Generated PME event.

PCI clock input.

Encoded DMA Request signal.

Serial IRQ input/Output.

These signal lines communicate address, control, and data in-

formation over the LPC bus between a host and a peripheral.

Indicates start of a new cycle or termination of a broken cycle.

Reset signal. It can connect to PCIRST# signal on the host.

32khz clock input, for CIR only.

- 13 -

Publication Release Date: June 09, 2006

Revision 2.27

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