W78354E Просмотр технического описания (PDF) - Winbond

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W78354E

MONITOR MICROCONTROLLER

Winbond 

W78C354

4. Interrupt Priority Register (IP)

BIT

NAME

FUNCTION

IP.7

- (Reserved)

IP.6

- (Reserved)

IP.5

*1

Define the DDC port's I2C interrupt priority level.

If IP.5 = 1, the priority level is higher.

IP.4

PS Define the serial port interrupt priority level.

If PS = 1, the priority level is higher.

IP.3

PT1 Define the Timer 1 interrupt priority level.

If PT1 = 1, the priority level is higher.

IP.2

*1

Define the *2 priority level.

If IP.2 = 1, the priority level is higher.

IP.1

PT0 Define the Timer 0 interrupt priority level.

If PT0 = 1, the priority level is higher.

IP.0

PX0 Define the external interrupt 0 priority level.

If PX0 = 1, the priority level is higher.

Notes:

*1. No name for ASSEMBLER, must be used via "IP.x".

*2. DSCLINT+ADCINT+TIMEOUT+SOAINT+VEVENT+PARAINT+DDC1INT.

C. Newly Added Special Function Registers

In addition to the 80C32 SFRs, the W78C354 has forty-nine new SFRs in the SFR address space, as

listed in Table 2.

Table 2. New special function registers

REGISTER ADDRESS

FUNCTION

LENGTH

1 CONTREG1

80H Control register 1, bit-addressable

8

2 CONTREG5

84H Control register 5

8

3 CONTREG2

85H Control register 2

8

4 PARAL

8EH Parabola interrupt generator low byte register

8

5 PARAH

8FH Parabola interrupt generator high byte register

8

6 AUTOLOAD

91H 8-bit auto-reload timer register

8

7 DHREG

92H Dummy Hsync frequency generator register

4

8 DVREG

93H Dummy Vsync frequency generator register

8

9 DDC1

94H DDC port's DDC1 data buffer

8

10 INTMSK

95H Interrupt mask register

8

11 BDDAC

96H 8-bit PWM register for 12-bit PWM/BRM dynamic DAC

8

12 DBRM

97H 4-bit BRM register for 12-bit PWM/BRM dynamic DAC

4

R/W

TYPE

R/W

R/W

W

W

W

W

W

W

W

W

W

W

RESET

CONTENT

00H

00H

00H

00H

00H

00H

00H

00H

00H

00H

00H

00H

- 10 -

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