B37872K5105K0 Просмотр технического описания (PDF) - EPCOS AG
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B37872K5105K0 Datasheet PDF : 5 Pages
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Multilayer ceramic capacitor
HighCV, X7R 1206 50 V
B37872K5105K0**
Chip
Further information
Please see General Technical Information at www.epcos.com/ceramic_capacitors or the data book
“Multilayer Ceramic Capacitors” for further information on:
Soldering directions
Taping and packing
Surface mounting instructions
Effects of mechanical stress
Cautions and warnings
Derating: A “state of the art” application design is essential to achieve failures rates at ppb level.
Do not use designs based on 100% of specified rated values.
AC applications may damage MLCC on a much lower level than DC voltage due to power
dissipation losses.
Mechanical stress - Please note EPCOS “General Technical Information”, “Surface mounting
instructions” and information about the effect of mechanical stress.
ESD - EPCOS recommends the use of varistors.
Further processing - care must be taken using moulding processes.
Combined stresses - the total stress (e.g. DC voltage, AC ripple, pulses and temperature) has to
be taken into account to estimate reliability of MLCC.
KB VS PE
Please read Cautions and Warnings and
Important notes at the end of this document.
Page 4 of 5
25.10.2005
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