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A8426

High Performance Photoflash Capacitor Charger with IGBT Driver

Allegro MicroSystems 

A8426

High Performance Photoflash Capacitor Charger

with IGBT Driver

Application Information

Circuit Description

mended values are:

The A8426 is a photoflash capacitor charger control

IC with a high current limit (up to 3.2 A) and low

RDS(on) (0.23 Ω maximum). The IC also integrates an

IGBT driver for strobe operation of the flash, dramati-

cally saving board space in comparison with discrete

solutions for strobe flash operation.

The IC is turned on by a low-to-high signal on the

CHARGE pin, provided that VIN is above the UVLO

level. Note that if CHARGE is already high before

VIN reaches the UVLO threshold, charging will not

start until CHARGE goes through another low-to-high

transition. When the charging cycle is initiated, the

primary current ramps up linearly at a rate determined

by the battery voltage and the primary side inductan

ce. When the primary current reaches the set limit, the

internal MOSFET is turned off immediately to allow

the energy to be dumped into the photoflash capacitor

through the secondary winding. The secondary current

drops linearly as the output capacitor is charged. The

charging cycle starts again when the transformer flux

is reset or after a predetermined time period (18 μs

maximum off-time) has passed, whichever occurs first.

R1 = R2 = 150 kΩ (type 1206), and

R3 = 1.20 kΩ (type 0603),

which together yield a target voltage of 300 V.

Using higher resistance ratings for R1, R2, and R3

does not offer significant efficiency improvement,

because the power loss of the feedback network occurs

mainly during switch off-time, and off-time is only a

small fraction of each charging cycle. Furthermore, if

values of R1 and R2 are too high, effects of parasitic

capacitance from the sensing network to GND may

affect the accuracy of the target voltage.

When the designated output voltage is reached, the

A8426 stops the charging until the CHARGE pin is

toggled again. Alternatively, pulling the CHARGE

pin low also stops the charging. The ¯D¯¯¯O¯¯¯N¯¯E¯ pin is an

open-drain indicator of when the designated output is

reached. Pulling the CHARGE pin low puts the A8426

into the low-current Standby mode and it forces the

¯D¯¯¯O¯¯¯N¯¯E¯ pin into a high impedence mode, irrespective of

the output voltage.

Target Output Voltage

Switch Current Limiting

Output voltage sensing is done using a resistor divider

network (see figure 1: R1, R2 and R3) on the second-

ary side of the transformer. The target output voltage

is determined by the ratio of the voltage divider:

(R1 + R2 + R3) / R3 = (VOUT + Vd ) / VFB , (1)

where Vd is the diode voltage drop (typically 1 to 2 V).

R1 and R2 together must have a breakdown voltage

of at least 300 V. A typical type 1206 surface mount

resistor has a 150 V breakdown voltage rating. It is

recommended that R1 and R2 have similar values to

ensure an even voltage stress between them. Recom-

The peak switch current limit is determined by a resis-

tor, RSET, connected between the ISET pin and GND.

The value of RSET can be between 22 and 72 kΩ.

This generates an ISET current between 17 and 55 μA,

which corresponds to a desired peak switch current in

a range from 1 to 3.2 A.

Smart Current Limit (Optional)

With the help of some simple external logic, the user

can change the charging current according to the bat-

tery voltage. For example, assume that ISET is nor-

mally 50 μA (for ISWlim = 2.75 A). Referring to the

Allegro MicroSystems, Inc.

9

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

www.allegromicro.com

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